XilinxUltraScale Class Reference

#include "XilinxUltraScale.h"

Inheritance diagram for XilinxUltraScale:

Collaboration diagram for XilinxUltraScale:

Public Member Functions
void	assembler (std::string, std::string)
void	assemblerAsmTo (std::ifstream &, std::ofstream &)
void	assemblerAsmToBin (std::ifstream &, std::ofstream &)
void	assemblerAsmToBit (std::ifstream &, std::ofstream &)
void	assemblerParseHeader (std::ifstream &)
void	blank (std::string)
void	change (std::string)
void	deviceHelp ()
void	disassemblerBinToAsm (std::string, std::ifstream &, std::ofstream &)
void	disassemblerBitToAsm (std::ifstream &, std::ofstream &)
void	disassemblerToAsm (std::ifstream &, std::ofstream &)
void	disassemblerWriteHeader (std::ofstream &)
void	ensureInitializedBitstreamArrays () override
int	getDeviceByIDCODE (int) override
int	getDeviceByIDCODEorThrow (int) override
int	getDeviceByName (std::string) override
int	getDeviceByNameOrThrow (std::string) override
std::string	getFrameType (int, int, int) override
void	initFabric ()
void	initializeResourceStringParameters () override
void	merge (XilinxUltraScale *, std::string, Rect2D, Coord2D)
void	outputBitstreamEmptySLRHeaderSequence (std::ofstream &, int, bool, Endianness) override
void	outputBitstreamEmptySLRWrapUpSequence (std::ofstream &, int, bool, Endianness) override
void	outputBitstreamGlobalFooterSequence (std::ofstream &, bool, Endianness) override
void	outputBitstreamGlobalHeaderSequence (std::ofstream &, bool, Endianness) override
	Written by outputBitstreamSLRHeaderAfterBitstreamSequence(), outputBitstreamEmptySLRHeaderSequence() and used by outputBitstreamSLRWrapUpSequence(), outputBitstreamEmptySLRWrapUpSequence() More...
void	outputBitstreamSLRFooterBitstreamSequence (std::ofstream &, int, bool, Endianness) override
void	outputBitstreamSLRHeaderAfterBitstreamSequence (std::ofstream &, int, bool, Endianness) override
void	outputBitstreamSLRHeaderBitstreamSequence (std::ofstream &, int, bool, Endianness) override
void	outputBitstreamSLRWrapUpSequence (std::ofstream &, int, bool, Endianness) override
void	readBitstream (std::string)
void	setDevice (int, std::string="") override
void	setDeviceByIDCODEOrThrow (int) override
void	setDeviceByNameOrThrow (std::string) override
void	setDeviceByPartNameOrThrow () override
void	test (bool, bool, uint32_t)
void	writeBitstream (std::string, std::string, Rect2D)
	XilinxUltraScale ()
virtual	~XilinxUltraScale ()
Public Member Functions inherited from CommonDevice2D
	CommonDevice2D ()
void	region (std::string, Rect2D)
virtual	~CommonDevice2D ()
Public Member Functions inherited from CommonDevice
	CommonDevice ()
void	log (std::string message)
void	printMessage (std::string message)
void	warn (std::string message)
virtual	~CommonDevice ()
Public Member Functions inherited from XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >
	XilinxConfigurationAccessPort ()
virtual	~XilinxConfigurationAccessPort ()

Public Attributes
std::streamoff	slrMagicInstrLocation [3]
Public Attributes inherited from CommonDevice2D
std::vector< Rect2D >	regionSelection
Public Attributes inherited from CommonDevice
int	enableLog
int	enableWarn
std::string	instanceName
Public Attributes inherited from XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >
uint32_t *	bitstreamBegin
uint32_t *	bitstreamBRAM [MAX_ROWS][MAX_BRAM_COLS]
uint32_t *	bitstreamCLB [MAX_ROWS][MAX_COLS]
uint32_t *	bitstreamEnd
bool	bitstreamHasValidData
std::string	designName
std::string	fileDate
std::string	fileTime
int	fromRow
std::streamoff	headerLocationOfRemainingFileLength
	gets set by outputBITheader() and gets used by outputBITheaderLengthField(). More...
uint32_t	IDCODE
std::string	initializedBitstreamParamsShortPartName
	the partName of currently initialized resource string parameters More...
std::string	initializedBitstreamShortPartName
	The partName of currently initialized bitstream buffers. More...
std::string	initializedResourceStringShortPartName
	the partName of currently initialized resource string parameters More...
Endianness	loadedBitstreamEndianness
	The endianess of the currently loaded bitstream. More...
bool	LUT_isFrameUnusedForResourceLetter [256]
int	LUT_numberOfFramesForResourceLetter [256]
std::string	LUT_typeOfFrameForResourceLetter [256]
int	maxNumberOfBRAMCols
int	maxNumberOfCols
int	numberOfBRAMCols [MAX_ROWS]
int	numberOfBRAMsBeforeCol [MAX_ROWS][MAX_COLS]
int	numberOfCols [MAX_ROWS]
int	numberOfFramesBeforeCol [MAX_ROWS][MAX_COLS]
int	numberOfFramesPerRow [MAX_ROWS]
int	numberOfRows
int	numberOfSLRs
int	numberOfWordsPerRow [MAX_ROWS]
std::string	partName
char	resourceString [MAX_ROWS][MAX_COLS]
int	rowsInBottomHalf
int	rowsInTopHalf
struct XilinxConfigurationAccessPort::SelectedOptions	selectedOptions
struct {
int   fromRow
uint32_t   IDCODE
int   rowsInBottomHalf
int   rowsInTopHalf
int   toRow
}	SLRinfo [MAX_SLRS]
int	toRow

Additional Inherited Members
Public Types inherited from XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >
enum class	MergeOP

Detailed Description

Definition at line 31 of file XilinxUltraScale.h.

Constructor & Destructor Documentation

XilinxUltraScale()

XilinxUltraScale::XilinxUltraScale

(

)

Definition at line 31 of file XilinxUltraScale.cpp.

{
    initFabric();
}

~XilinxUltraScale()

XilinxUltraScale::~XilinxUltraScale ( )

virtual

Definition at line 36 of file XilinxUltraScale.cpp.

{
}

Member Function Documentation

assembler()

void XilinxUltraScale::assembler	(	std::string	,
		std::string
	)

Definition at line 32 of file XUS_Assembler.cpp.

{
    enum FILEFORMAT {FILE_NULL = 0, FILE_BIT, FILE_BIN, FILE_BIT_ASM};
    FILEFORMAT fileformatIn = FILE_NULL, fileformatOut = FILE_NULL;
    
    if(str::iff::stringEndsWith(filenameIn, ".bit"))
        fileformatIn = FILE_BIT;
    if(str::iff::stringEndsWith(filenameIn, ".bin"))
        fileformatIn = FILE_BIN;
    if(str::iff::stringEndsWith(filenameIn, ".bitasm"))
        fileformatIn = FILE_BIT_ASM;
    if(str::iff::stringEndsWith(filenameOut, ".bit"))
        fileformatOut = FILE_BIT;
    if(str::iff::stringEndsWith(filenameOut, ".bin"))
        fileformatOut = FILE_BIN;
    if(str::iff::stringEndsWith(filenameOut, ".bitasm"))
        fileformatOut = FILE_BIT_ASM;
    
    ifstream fin (filenameIn, ifstream::binary);
    if(!fin.good())
        throw runtime_error(string("Could not open file: \"").append(filenameIn).append("\" .\n"));
    
    ofstream fout (filenameOut, ofstream::binary | ofstream::trunc);
    if(!fout.good())
        throw runtime_error(string("Could not open file: \"").append(filenameOut).append("\"!\n"));
    
    if(fileformatIn == FILE_BIT && fileformatOut == FILE_BIT_ASM)
        disassemblerBitToAsm(fin, fout);
    else if(fileformatIn == FILE_BIN && fileformatOut == FILE_BIT_ASM)
        disassemblerBinToAsm(filenameIn, fin, fout);
    else if(fileformatIn == FILE_BIT_ASM && fileformatOut == FILE_BIT)
        assemblerAsmToBit(fin, fout);
    else if(fileformatIn == FILE_BIT_ASM && fileformatOut == FILE_BIN)
        assemblerAsmToBin(fin, fout);
    else
        throw runtime_error(string("Unknown Xilinx US assembler operation between file formats. See \"byteman -h assembly\".\n"));
    fin.close();
    fout.close();
}

References str::iff::stringEndsWith().

Here is the call graph for this function:

assemblerAsmTo()

void XilinxUltraScale::assemblerAsmTo	(	std::ifstream &	,
		std::ofstream &
	)

Definition at line 125 of file XUS_Assembler.cpp.

{
    outputCAPheaderConstant(fout, loadedBitstreamEndianness);
    
    XCAP::Register regAddr = XCAP::Register::UNDEFINED;
    int frameCount = 0;
    int slr = 0, b = 7, r = 0, c = 0, m = 0;
    for (string line; getline(fin, line); ) {
        if(line.at(line.find_first_not_of(" \t")) == '#')// if #, skip that line as comment
            continue;
        transform(line.begin(), line.end(), line.begin(), ::toupper);
        replace(line.begin(), line.end(), '=',' ');
        replace(line.begin(), line.end(), '#',' ');
        replace(line.begin(), line.end(), ',', ' ');
        if(str::iff::stringContains(line, "SYNC") && (!str::iff::stringContains(line, "DESYNC"))){
            XCAP_writeSYNQ(fout, loadedBitstreamEndianness);
        }
        else if(str::iff::stringContains(line, ".WORD")){
            uint32_t wordValue;
            if(!str::parse::multipleUints(line, wordValue))wordValue = 0;
            FileIO::write32(fout, wordValue, loadedBitstreamEndianness);
        }
        else if(str::iff::stringContains(line, ".BYTE")){
            uint32_t value;
            if(!str::parse::multipleUints(line, value))value = 0;
            uint32_t byteValue = value % 256;
            FileIO::write8(fout, byteValue, loadedBitstreamEndianness);
        }
        else if(str::iff::stringContains(line, "NOP")){
            int nopHiddenValue;
            if(!str::parse::multipleInts(line, nopHiddenValue))nopHiddenValue = 0;
            XCAP_writeNOP(fout, 1, nopHiddenValue, loadedBitstreamEndianness);
        }
        else if(str::iff::stringContains(line, "RESERVED")){
            int reservedHiddenValue;
            if(!str::parse::multipleInts(line, reservedHiddenValue))reservedHiddenValue = 0;
            XCAP_writeRESERVED(fout, 1, reservedHiddenValue, loadedBitstreamEndianness);
        }
        else if(str::iff::stringContains(line, "SELECT NEXT SLR")){
            slr++;
            int magic1size;
            if(!str::parse::multipleInts(line, magic1size))magic1size = 0;
            XCAP_writeSelectRegister(fout, XCAP::Register::MAGIC1, loadedBitstreamEndianness);
            XCAP_writeType2(fout, magic1size, loadedBitstreamEndianness);
        }
        else if(str::iff::stringContains(line, "@")){
            XCAP::Register newRegAddr = getXCAPregister(line);
            if(str::iff::stringContains(line, "READ REG @")){
                int readLength;
                if(!str::parse::multipleInts(line, readLength)) readLength = 1; // default read length is 1 if unspecified
                XCAP_writeReadRegister(fout, newRegAddr, readLength, loadedBitstreamEndianness);
            } else {// must be a write then ¯\_(ツ)_/¯
            
                if(newRegAddr == XCAP::Register::UNDEFINED){
                    throw runtime_error(string("Couldn't parse assembly command: \"").append(line).append("\"!"));
                } else if(str::iff::stringContains(line, "SELECT REGISTER")){
                    XCAP_writeSelectRegister(fout, newRegAddr, loadedBitstreamEndianness);
                } else if(newRegAddr == XCAP::Register::FDRI){
                    if(!str::parse::multipleInts(line, frameCount))
                        throw runtime_error(string("FDRI command needs size: \"").append(line).append("\"!"));
                    int wordCount = frameCount * XUS_WORDS_PER_FRAME;
                    if(regAddr == XCAP::Register::FDRI) {
                        XCAP_writeType2(fout, wordCount, loadedBitstreamEndianness);
                    } else {
                        XCAP_writeFDRI1(fout, wordCount, loadedBitstreamEndianness);
                    }
                    if(frameCount > 0){
                        string frameLine;
                        for (string frameLine; getline(fin, frameLine); ) {
                            if(frameLine.at(frameLine.find_first_not_of(" \t")) == '#')// if #, skip that line as comment
                                continue;
                            uint32_t frameData[XUS_WORDS_PER_FRAME];
                            if(!str::parse::arrayOfUints(frameLine, XUS_WORDS_PER_FRAME, &frameData[0]))
                                throw runtime_error(string("Was expecting the data for a full frame on this line: \"").append(frameLine).append("\", because I think there are ").append(to_string(frameCount)).append(" frames left."));
                            //first 3 words are clk, next 90 are the 0-45 and 48-93 data words
                            for (int w = XUS_WORDS_AT_CLK; w < (XUS_WORDS_AT_CLK + XUS_WORDS_BEFORE_CLK) ; w++){
                                FileIO::write32(fout, frameData[w], loadedBitstreamEndianness);
                            }
                            for (int w = 0; w < XUS_WORDS_AT_CLK ; w++){
                                FileIO::write32(fout, frameData[w], loadedBitstreamEndianness);
                            }
                            for (int w = (XUS_WORDS_AT_CLK + XUS_WORDS_BEFORE_CLK); w < XUS_WORDS_PER_FRAME ; w++){
                                FileIO::write32(fout, frameData[w], loadedBitstreamEndianness);
                            }
                            
                            frameCount--;
                            if(frameCount == 0)
                                break;
                        }
                        if(frameCount != 0)
                            throw runtime_error(string("End of file reached while performing FDRI frame writes.!"));
                    }
                } else if(newRegAddr == XCAP::Register::FAR){
                    if(!str::parse::multipleInts(line, b, r, c, m))
                        throw runtime_error(string("Could not parse the new FAR value: \"").append(line).append("\"!"));
                    r += SLRinfo[slr].fromRow;
                    uint32_t farValue = XCAP_getFAR(slr, b, r, c, m);
                    XCAP_writeRegister(fout, XCAP::Register::FAR, farValue, loadedBitstreamEndianness);
                } else {
                    uint32_t newValue;
                    if(!str::parse::multipleUints(line, newValue))
                        throw runtime_error(string("Could not parse the new register value: \"").append(line).append("\"!"));
                    XCAP_writeRegister(fout, newRegAddr, newValue, loadedBitstreamEndianness);
                }
            }
            regAddr = newRegAddr;
        } else {// ! str::iff::stringContains(line, "@")
            //must have been a command then
            XCAP::Command cmdID = getXCAPcommand(line);
            if(cmdID == XCAP::Command::UNDEFINED)
                throw runtime_error(string("Couldn't parse assembly command: \"").append(line).append("\"!"));
            XCAP_writeCommand(fout, cmdID, loadedBitstreamEndianness);
        }
    }
    outputBITheaderLengthField(fout, loadedBitstreamEndianness);
}

References str::parse::arrayOfUints(), XCAP::FAR, XCAP::FDRI, getXCAPcommand(), getXCAPregister(), XCAP::MAGIC1, str::parse::multipleInts(), str::parse::multipleUints(), outputBITheaderLengthField(), outputCAPheaderConstant(), str::replace(), str::iff::stringContains(), Endian::to_string(), XCAP::UNDEFINED, FileIO::write32(), FileIO::write8(), XCAP_getFAR(), XCAP_writeCommand(), XCAP_writeFDRI1(), XCAP_writeNOP(), XCAP_writeReadRegister(), XCAP_writeRegister(), XCAP_writeRESERVED(), XCAP_writeSelectRegister(), XCAP_writeSYNQ(), XCAP_writeType2(), XUS_WORDS_AT_CLK, XUS_WORDS_BEFORE_CLK, and XUS_WORDS_PER_FRAME.

Here is the call graph for this function:

assemblerAsmToBin()

void XilinxUltraScale::assemblerAsmToBin	(	std::ifstream &	,
		std::ofstream &
	)

Definition at line 98 of file XUS_Assembler.cpp.

                                                                     {
    assemblerParseHeader(fin);
    
    setDeviceByPartNameOrThrow();
    initializeResourceStringParameters();
    
    assemblerAsmTo(fin, fout);
}

assemblerAsmToBit()

void XilinxUltraScale::assemblerAsmToBit	(	std::ifstream &	,
		std::ofstream &
	)

Definition at line 89 of file XUS_Assembler.cpp.

                                                                     {
    assemblerParseHeader(fin);
    
    setDeviceByPartNameOrThrow();
    initializeResourceStringParameters();
    outputBITheader(fout, loadedBitstreamEndianness);
    
    assemblerAsmTo(fin, fout);
}

References outputBITheader().

Here is the call graph for this function:

assemblerParseHeader()

void XilinxUltraScale::assemblerParseHeader

(

std::ifstream &

)

Definition at line 107 of file XUS_Assembler.cpp.

{
    for (string line; getline(fin, line); ) {
        auto firstEqPos = line.find_first_of('=');
        if(firstEqPos != string::npos)
            line.replace(firstEqPos, 1, '=',' ');
        
        if(str::iff::stringContains(line, "Name"))designName = str::parse::lastStringWord(line);
        if(str::iff::stringContains(line, "FPGA"))partName = str::parse::lastStringWord(line);
        if(str::iff::stringContains(line, "Date"))fileDate = str::parse::lastStringWord(line);
        if(str::iff::stringContains(line, "Time"))fileTime = str::parse::lastStringWord(line);
        if(str::iff::stringContains(line, "HEADER END"))break;
    }
    log("Design name: " + designName);
    log("FPGA: " + partName);
    log("Date: " + fileDate);
    log("Time: " + fileTime);
}

References str::parse::lastStringWord(), and str::iff::stringContains().

Here is the call graph for this function:

blank()

void XilinxUltraScale::blank

(

std::string

)

Definition at line 22 of file XUS_Blank.cpp.

                                         {
    ensureInitializedBitstreamArrays();
    parseParams(params);
    blankBuffers();
}

References blankBuffers(), and parseParams().

Here is the call graph for this function:

change()

void XilinxUltraScale::change

(

std::string

)

Definition at line 25 of file XUS_Change.cpp.

{
    parseParams(params);
    if(selectedOptions.forceEndianness)
        ensureSelectedEndianness(selectedOptions.forcedEndianness);
    if(selectedOptions.word)
        setBitstreamWord(params);
}

References ensureSelectedEndianness(), parseParams(), and setBitstreamWord().

Here is the call graph for this function:

deviceHelp()

void XilinxUltraScale::deviceHelp

(

)

Definition at line 207 of file XUS_Devices.cpp.

{
    if(initializedResourceStringShortPartName == "") {//if no device is initialized
        cout << "A list of currently supported Xilinx UltraScale devices: " << endl;
        #ifdef XUSKINTEX
        cout << "  UltraScale Kintex: " << endl;
        cout << "    XCKU025, XCKU035, XCKU040, XQKU040, XCKU060, XQKU060, XQRKU060, XCKU085, XCKU095, XQKU095, XCKU115, XQKU0115" << endl;
        #endif
        #ifdef XUSVIRTEX
        cout << "  UltraScale Virtex: " << endl;
        cout << "    XCVU065, XCVU080, XCVU095, XCVU125, XCVU160, XCVU190, XCVU440" << endl;
        #endif
    } else {
        printResourceStringInfo();
    }
}

References printResourceStringInfo().

Here is the call graph for this function:

disassemblerBinToAsm()

void XilinxUltraScale::disassemblerBinToAsm	(	std::string	,
		std::ifstream &	,
		std::ofstream &
	)

Definition at line 72 of file XUS_Assembler.cpp.

                                                                                            {
    loadedBitstreamEndianness = parseBitstreamEndianness(fin);
    uint32_t idcode = parseBitstreamIDCODE(fin, loadedBitstreamEndianness);
    setDeviceByIDCODEOrThrow(idcode);
    designName = filenameIn;
    updateDateAndTime();
    
    disassemblerToAsm(fin, fout);
}

References parseBitstreamEndianness(), parseBitstreamIDCODE(), and updateDateAndTime().

Here is the call graph for this function:

disassemblerBitToAsm()

void XilinxUltraScale::disassemblerBitToAsm	(	std::ifstream &	,
		std::ofstream &
	)

Definition at line 82 of file XUS_Assembler.cpp.

                                                                         {
    loadedBitstreamEndianness = parseBitstreamEndianness(fin);
    parseBITheader(fin, loadedBitstreamEndianness);
    setDeviceByPartNameOrThrow();
    
    disassemblerToAsm(fin, fout);
}

References parseBITheader(), and parseBitstreamEndianness().

Here is the call graph for this function:

disassemblerToAsm()

void XilinxUltraScale::disassemblerToAsm	(	std::ifstream &	,
		std::ofstream &
	)

Definition at line 252 of file XUS_Assembler.cpp.

                                                                      {
    initializeResourceStringParameters();
    disassemblerWriteHeader(fout);
    
    XCAP::Register regAddr = XCAP::Register::UNDEFINED;
    bool synched = false;
    bool aligned = false;
    int wordCount = 0;
    int shadowFrameValid = 0;
    int slr = 0, b = 7, r = 0, c = 0, m = 0;
    //Parse bitstream
    for( ; ; ){
        if(!fin.good()){
            break; // done with the bitstream
        } else {
            if(!synched){
                streamoff startFileOffset = fin.tellg();
                streamoff endFileOffset;
                if(!aligned){
                    if(findBitstreamSyncSequence(fin, loadedBitstreamEndianness)){
                        endFileOffset = fin.tellg() - (streamoff)4;
                        synched = true;
                        aligned = true;
                    } else {//end of bitstream
                        endFileOffset = fin.tellg();
                    }
                } else { //already aligned
                    if(findBitstreamSyncWord(fin, loadedBitstreamEndianness)){
                        endFileOffset = fin.tellg() - (streamoff)4;
                        synched = true;
                    } else {//end of bitstream
                        endFileOffset = fin.tellg();
                    }
                }
                fin.seekg(startFileOffset, fin.beg);
                assemblyOutputData(fin, fout, (endFileOffset - startFileOffset));
                if(synched){
                    FileIO::read32(fin);//discard sync command
                    fout << "SYNC" << endl;
                } else {
                    break; //if still not synched, then we reached end of file
                }
            } else {
                uint32_t instruction = FileIO::read32(fin, loadedBitstreamEndianness);
                int instructionType = XCAP_getInstructionType(instruction);
                XCAP::Operation instructionOPCODE = XCAP_getInstructionOperation(instruction);
                int instructionPayload = XCAP_getInstructionPayload(instruction);
                if(instructionType == 1) {
                    wordCount = XCAP_getInstructionWordCount(instruction);
                    regAddr = XCAP_getInstructionRegister(instruction);
                } else if(instructionType == 2) {
                    wordCount = instructionPayload;
                } else {
                    fout << "0x" << uppercase << hex << setw(8) << setfill('0') << instruction << " (Invalid instruction [invalid type])" << endl;
                    continue;
                }
                
                if(instructionOPCODE == XCAP::Operation::NOP) {
                    if(instructionPayload != 0)
                        fout << "NOP #" << instructionPayload << endl;
                    else
                        fout << "NOP" << endl;
                } else if(instructionOPCODE == XCAP::Operation::RESERVED) {
                    if(instructionPayload != 0)
                        fout << "RESERVED #" << instructionPayload << endl;
                    else
                        fout << "RESERVED" << endl;
                } else if(instructionOPCODE == XCAP::Operation::READ) {
                    fout << "Read Reg @";
                    writeXCAPregisterName(fout, regAddr);
                    fout << " for length #" << wordCount << endl;
                } else { // XCAP::Operation::WRITE
                    if((regAddr == XCAP::Register::FDRI) && (wordCount > 0) && (wordCount % XUS_WORDS_PER_FRAME == 0)) {
                        if(shadowFrameValid) {
                            fout << dec << "# Shadow register contents are written to frame (BlockType=" << b << ", GlobalRowAddress=" << r << ", MajorAddress=" << c << ", MinorAddress=" << m << ") (Frame type: " << getFrameType(b, r, c) << ")." << endl;
                            XCAP_IncrementFAR(slr, b, r, c, m);
                        }
                        shadowFrameValid = 1;
                        int frameCount = (wordCount/XUS_WORDS_PER_FRAME);
                        fout << dec << "@FDRI for #" << frameCount << " frames:" << endl;
                        for(int i = 0 ; i < frameCount ; i++){
                            fout << "# ";
                            if(i == (frameCount-1)) fout << "(This frame data is written to shadow register!)";
                            fout << dec << "Writing frame #" << i << " (BlockType=" << b << ", GlobalRowAddress=" << r << ", MajorAddress=" << c << ", MinorAddress=" << m << ") (Frame type: " << getFrameType(b, r, c) << ") hex data:" << endl;
                            uint32_t frameData[XUS_WORDS_PER_FRAME];
                            for(int w = 0 ; w < XUS_WORDS_PER_FRAME ; w++){
                                frameData[w] = FileIO::read32(fin, loadedBitstreamEndianness);
                            }
                            fout << "CLOCK: ";
                            for(int w = XUS_WORDS_BEFORE_CLK ; w < (XUS_WORDS_BEFORE_CLK + XUS_WORDS_AT_CLK) ; w++){
                                fout << "0x" << uppercase << hex << setw(8) << setfill('0') << frameData[w] << " ";
                            }
                            fout << " ;DATA: ";
                            for(int w = 0 ; w < XUS_WORDS_BEFORE_CLK ; w++){
                                fout << "0x" << uppercase << hex << setw(8) << setfill('0') << frameData[w] << " ";
                            }
                            for(int w = (XUS_WORDS_BEFORE_CLK + XUS_WORDS_AT_CLK) ; w < XUS_WORDS_PER_FRAME ; w++){
                                fout << "0x" << uppercase << hex << setw(8) << setfill('0') << frameData[w] << " ";
                            }
                            fout << endl;
                            XCAP_IncrementFAR(slr, b, r, c, m);
                        }
                    } else if(regAddr == XCAP::Register::CMD && wordCount == 1){
                        uint32_t writeData = FileIO::read32(fin, loadedBitstreamEndianness);
                        writeXCAPcommandName(fout, static_cast<XCAP::Command>(writeData));
                        fout << ";";
                        if(XCAP::Command::DESYNC == static_cast<XCAP::Command>(writeData)){
                            shadowFrameValid = 0;
                            synched = false;
                        }
                        if(XCAP::Command::WCFG == static_cast<XCAP::Command>(writeData)){
                            shadowFrameValid = 0;
                            fout << " (also clears shadow register)";
                        }
                        fout << endl;
                    } else if(regAddr == XCAP::Register::MAGIC1){
                        uint32_t nextInstr = FileIO::read32(fin, loadedBitstreamEndianness);
                        int nextInstrType = XCAP_getInstructionType(nextInstr);
                        XCAP::Operation nextInstrOP = XCAP_getInstructionOperation(nextInstr);
                        int nextInstrPayload = XCAP_getInstructionPayload(nextInstr);
                        if(2 == nextInstrType && XCAP::Operation::WRITE == nextInstrOP && 0 < nextInstrPayload){
                            slr++;
                            synched = false;
                            aligned = false;
                            fout << "Select next SLR for the next #" << dec << nextInstrPayload << " words." << endl;
                        } else {
                            fout << "Bad MAGIC1 instruction" << endl;
                            fin.seekg(-4, ios::cur);//rewind next instruction if not
                        }
                    } else if((instructionType == 1) && (wordCount == 0)){
                        fout << "Select register @";
                        writeXCAPregisterName(fout, regAddr);
                        fout << endl;
                    } else if(wordCount == 1){
                        uint32_t writeData = FileIO::read32(fin, loadedBitstreamEndianness);
                        fout << "@";
                        writeXCAPregisterName(fout, regAddr);
                        if(regAddr == XCAP::Register::FAR) {
                            XCAP_parseFAR(writeData, slr, b, r, c, m);
                            fout << " = BlockType=" << dec << b << " RowAddress=" << (r-SLRinfo[slr].fromRow) << " MajorAddress=" << c << " MinorAddress=" << m << endl;
                        } else {
                            fout << " = 0x" << uppercase << hex << setw(8) << setfill('0') << writeData << endl;
                        }
                    } else {
                        fout << "0x" << uppercase << hex << setw(8) << setfill('0') << instruction << "(Bad instruction)" << endl;
                    }
                } // OP_WRITE
            }// if synched
        } // if fin is still good
    } // for(;;)
}

References assemblyOutputData(), XCAP::CMD, XCAP::DESYNC, XCAP::FAR, XCAP::FDRI, findBitstreamSyncSequence(), findBitstreamSyncWord(), XCAP::MAGIC1, XCAP::NOP, XCAP::READ, FileIO::read32(), XCAP::RESERVED, XCAP::UNDEFINED, XCAP::WCFG, XCAP::WRITE, writeXCAPcommandName(), writeXCAPregisterName(), XCAP_getInstructionOperation(), XCAP_getInstructionPayload(), XCAP_getInstructionRegister(), XCAP_getInstructionType(), XCAP_getInstructionWordCount(), XCAP_IncrementFAR(), XCAP_parseFAR(), XUS_WORDS_AT_CLK, XUS_WORDS_BEFORE_CLK, and XUS_WORDS_PER_FRAME.

Here is the call graph for this function:

disassemblerWriteHeader()

void XilinxUltraScale::disassemblerWriteHeader

(

std::ofstream &

)

Definition at line 242 of file XUS_Assembler.cpp.

{
    fout << "--- HEADER BEGIN ---" << endl;
    fout << "Name = \"" << designName << "\"" << endl;
    fout << "FPGA = \"" << partName << "\"" << endl;
    fout << "Date = \"" << fileDate << "\"" << endl;
    fout << "Time = \"" << fileTime << "\"" << endl;
    fout << "--- HEADER END ---" << endl;
}

ensureInitializedBitstreamArrays()

void XilinxUltraScale::ensureInitializedBitstreamArrays ( )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 77 of file XilinxUltraScale.cpp.

                                                       {
    if(initializedResourceStringShortPartName == "")
        throw runtime_error("The target device needs to be known, before you can manipulate any bitstream!");
    if(initializedBitstreamShortPartName != initializedResourceStringShortPartName){//The device is changed
        initializedBitstreamShortPartName = initializedResourceStringShortPartName;
        if(bitstreamBegin != nullptr)
            delete bitstreamBegin;
        initializeResourceStringParameters();
        //Allocate
        int clbPlaneSize = numberOfRows * numberOfWordsPerRow[0];
        int bramPlaneSize = numberOfRows * XUS_WORDS_PER_FRAME * (XUS_EXTRA_FRAMES_PER_ROW + maxNumberOfBRAMCols * XUS_FRAMES_PER_BRAM_CONTENT_COLUMN);
 
        bitstreamBegin = new uint32_t[clbPlaneSize + bramPlaneSize];
        //Calc pointers
        int offset = 0;
        
        for(int slr = 0 ; slr < numberOfSLRs ; slr++){
            for(int r = SLRinfo[slr].fromRow ; r <= SLRinfo[slr].toRow ; r++){
                for(int c = 0 ; c < numberOfCols[r] ; c++){
                    bitstreamCLB[r][c] = &bitstreamBegin[offset];
                    offset += LUT_numberOfFramesForResourceLetter[(uint8_t)resourceString[r][c]] * XUS_WORDS_PER_FRAME;
                }
            }
            for(int r = SLRinfo[slr].fromRow ; r <= SLRinfo[slr].toRow ; r++){
                for(int c = 0 ; c < numberOfBRAMCols[r] ; c++){
                    bitstreamBRAM[r][c] = &bitstreamBegin[offset];
                    offset += XUS_FRAMES_PER_BRAM_CONTENT_COLUMN*XUS_WORDS_PER_FRAME;
                }
                bitstreamBRAM[r][numberOfBRAMCols[r]] = &bitstreamBegin[offset];
                offset += XUS_EXTRA_FRAMES_PER_ROW * XUS_WORDS_PER_FRAME;
            }
        }
        bitstreamEnd = &bitstreamBegin[offset];
        bitstreamHasValidData = false;
 
        log("Reserved " + to_string(clbPlaneSize + bramPlaneSize) + " words for the bitstream buffers of device \"" + partName + "\"");
    }
}

References Endian::to_string(), XUS_EXTRA_FRAMES_PER_ROW, XUS_FRAMES_PER_BRAM_CONTENT_COLUMN, and XUS_WORDS_PER_FRAME.

Here is the call graph for this function:

getDeviceByIDCODE()

int XilinxUltraScale::getDeviceByIDCODE ( int  IDCODE )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 58 of file XUS_Devices.cpp.

{
    //US Kintex
    #ifdef XUSKINTEX
    if(IDCODE == XCKU025_IDCODE)
        return XUS_DEVICE_XCKU025;
    if(IDCODE == XCKU035_IDCODE)
        return XUS_DEVICE_XCKU035;
    if(IDCODE == XCKU040_IDCODE)
        return XUS_DEVICE_XCKU040;
    if(IDCODE == XCKU060_IDCODE)
        return XUS_DEVICE_XCKU060;
    if(IDCODE == XCKU085_IDCODE)
        return XUS_DEVICE_XCKU085;
    if(IDCODE == XCKU095_IDCODE)
        return XUS_DEVICE_XCKU095;
    if(IDCODE == XCKU115_IDCODE)
        return XUS_DEVICE_XCKU115;
    #endif
    //US Virtex
    #ifdef XUSVIRTEX
    if(IDCODE == XCVU065_IDCODE)
        return XUS_DEVICE_XCVU065;
    if(IDCODE == XCVU080_IDCODE)
        return XUS_DEVICE_XCVU080;
    if(IDCODE == XCVU095_IDCODE)
        return XUS_DEVICE_XCVU095;
    if(IDCODE == XCVU125_IDCODE)
        return XUS_DEVICE_XCVU125;
    if(IDCODE == XCVU160_IDCODE)
        return XUS_DEVICE_XCVU160;
    if(IDCODE == XCVU190_IDCODE)
        return XUS_DEVICE_XCVU190;
    if(IDCODE == XCVU440_IDCODE)
        return XUS_DEVICE_XCVU440;
    #endif
    
    return XUS_DEVICE_NULL;
}

References XCKU025_IDCODE, XCKU035_IDCODE, XCKU040_IDCODE, XCKU060_IDCODE, XCKU085_IDCODE, XCKU095_IDCODE, XCKU115_IDCODE, XCVU065_IDCODE, XCVU080_IDCODE, XCVU095_IDCODE, XCVU125_IDCODE, XCVU160_IDCODE, XCVU190_IDCODE, XCVU440_IDCODE, XUS_DEVICE_NULL, XUS_DEVICE_XCKU025, XUS_DEVICE_XCKU035, XUS_DEVICE_XCKU040, XUS_DEVICE_XCKU060, XUS_DEVICE_XCKU085, XUS_DEVICE_XCKU095, XUS_DEVICE_XCKU115, XUS_DEVICE_XCVU065, XUS_DEVICE_XCVU080, XUS_DEVICE_XCVU095, XUS_DEVICE_XCVU125, XUS_DEVICE_XCVU160, XUS_DEVICE_XCVU190, and XUS_DEVICE_XCVU440.

getDeviceByIDCODEorThrow()

int XilinxUltraScale::getDeviceByIDCODEorThrow ( int  IDCODE )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 28 of file XUS_Devices.cpp.

{
    int deviceID = getDeviceByIDCODE(IDCODE);
    if(deviceID == XUS_DEVICE_NULL)
        throw runtime_error(string("Unknown device with IDCODE = ").append(to_string(IDCODE)).append(" . Maybe the device is not Xilinx UltraScale device?"));
    return deviceID;
}

References Endian::to_string(), and XUS_DEVICE_NULL.

Here is the call graph for this function:

getDeviceByName()

int XilinxUltraScale::getDeviceByName ( std::string  )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 97 of file XUS_Devices.cpp.

{
    name = str::removeSpaces(name);
    name = str::stringToLower(name);
    
    //US Kintex
    #ifdef XUSKINTEX
        if(str::iff::stringContains(name, XCKU025_NAME))
            return XUS_DEVICE_XCKU025;
        if(str::iff::stringContains(name, XCKU035_NAME))
            return XUS_DEVICE_XCKU035;
        if(str::iff::stringContains(name, XCKU040_NAME, "xqku040"))
            return XUS_DEVICE_XCKU040;
        if(str::iff::stringContains(name, XCKU060_NAME, "xqku060", "xqrku060"))
            return XUS_DEVICE_XCKU060;
        if(str::iff::stringContains(name, XCKU085_NAME))
            return XUS_DEVICE_XCKU085;
        if(str::iff::stringContains(name, XCKU095_NAME, "xqku095"))
            return XUS_DEVICE_XCKU095;
        if(str::iff::stringContains(name, XCKU115_NAME, "xqku115"))
            return XUS_DEVICE_XCKU115;
    #endif
    //US Virtex
    #ifdef XUSVIRTEX
        if(str::iff::stringContains(name, XCVU065_NAME))
            return XUS_DEVICE_XCVU065;
        if(str::iff::stringContains(name, XCVU080_NAME))
            return XUS_DEVICE_XCVU080;
        if(str::iff::stringContains(name, XCVU095_NAME))
            return XUS_DEVICE_XCVU095;
        if(str::iff::stringContains(name, XCVU125_NAME))
            return XUS_DEVICE_XCVU125;
        if(str::iff::stringContains(name, XCVU160_NAME))
            return XUS_DEVICE_XCVU160;
        if(str::iff::stringContains(name, XCVU190_NAME))
            return XUS_DEVICE_XCVU190;
        if(str::iff::stringContains(name, XCVU440_NAME))
            return XUS_DEVICE_XCVU440;
    #endif
    
    return XUS_DEVICE_NULL;
}

References str::removeSpaces(), str::iff::stringContains(), str::stringToLower(), XCKU025_NAME, XCKU035_NAME, XCKU040_NAME, XCKU060_NAME, XCKU085_NAME, XCKU095_NAME, XCKU115_NAME, XCVU065_NAME, XCVU080_NAME, XCVU095_NAME, XCVU125_NAME, XCVU160_NAME, XCVU190_NAME, XCVU440_NAME, XUS_DEVICE_NULL, XUS_DEVICE_XCKU025, XUS_DEVICE_XCKU035, XUS_DEVICE_XCKU040, XUS_DEVICE_XCKU060, XUS_DEVICE_XCKU085, XUS_DEVICE_XCKU095, XUS_DEVICE_XCKU115, XUS_DEVICE_XCVU065, XUS_DEVICE_XCVU080, XUS_DEVICE_XCVU095, XUS_DEVICE_XCVU125, XUS_DEVICE_XCVU160, XUS_DEVICE_XCVU190, and XUS_DEVICE_XCVU440.

Here is the call graph for this function:

getDeviceByNameOrThrow()

int XilinxUltraScale::getDeviceByNameOrThrow ( std::string  )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 36 of file XUS_Devices.cpp.

{
    int deviceID = getDeviceByName(name);
    if(deviceID == XUS_DEVICE_NULL)
        throw runtime_error(string("Unknown device: ").append(name).append(". Maybe the device is not Xilinx UltraScale device?"));
    return deviceID;
}

References XUS_DEVICE_NULL.

getFrameType()

string XilinxUltraScale::getFrameType ( int  blockType, int  rowAddress, int  columnAddress  )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 116 of file XilinxUltraScale.cpp.

                                                                                     {
    if(XUS_BLOCKTYPE_BLOCKRAM == blockType)
        return "BlockRAM Contents";
    else if(XUS_BLOCKTYPE_LOGIC == blockType)
        return LUT_typeOfFrameForResourceLetter[(uint8_t)resourceString[rowAddress][columnAddress]];
    else
        return "Unknown";
}

References XUS_BLOCKTYPE_BLOCKRAM, and XUS_BLOCKTYPE_LOGIC.

initFabric()

void XilinxUltraScale::initFabric

(

)

Definition at line 22 of file XUS_Fabric.cpp.

                                 {
    setFabricChar(char(0), 0, "EndedLine", true);
    setFabricChar(char(1), XUS_EXTRA_FRAMES_PER_ROW, "EndOfLine", true);
    //The Xilinx US fabric in byteman is encoded in the following letters:
 
    //A-D are brams
    setFabricChar('A', 4, "BRAM/RCLK_RCLK_BRAM_L_BRAMCLMP_FT");        //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_RCLK_BR
    setFabricChar('B', 4, "BRAM/RCLK_RCLK_BRAM_L_AUXCLMP_FT");         //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_RCLK_BR
    setFabricChar('C', 4, "BRAM/RCLK_BRAM_L");                         //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_BRAM_L"
    setFabricChar('D', 4, "BRAM/RCLK_BRAM_R");                         //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_BRAM_R"
 
    //E-F, R are DSPs
    setFabricChar('E', 4, "DSP/RCLK_DSP_L");                           //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_DSP_L"
    setFabricChar('F', 6, "DSP/RCLK_DSP_CLKBUF_L");                    //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_DSP_CLKBUF_L"
 
    //G-H are interconnect cols with different clock resources
    setFabricChar('G', 58, "INT/RCLK_INT_L");                          //"INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT/RCLK_INT_L"   
    setFabricChar('H', 58, "INT/RCLK_INT_R");                          //"INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT/RCLK_INT_R"
 
    //I-J are CLEL_R tiles with different clock resources
    setFabricChar('I', 12, "CLEL_R/RCLK_CLEL_R_L");                    //"CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R/RCLK_CLEL_R_L"
    setFabricChar('J', 12, "CLEL_R/RCLK_CLEL_R_R");                    //"CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R/RCLK_CLEL_R_R"
 
    //K-L are CLEL_L tiles with different clock resources
    setFabricChar('K', 12, "CLEL_L/RCLK_CLEL_R");                      //"CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L/RCLK_CLEL_R"
    setFabricChar('L', 12, "CLEL_L/RCLK_CLEL_L");                      //"CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L/RCLK_CLEL_L"
 
    //M-N are CLE_M tiles with different clock resources
    setFabricChar('M', 12, "CLE_M/RCLK_CLE_M_L");                      //"CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M/RCLK_CLE_M_L"
    setFabricChar('N', 12, "CLE_M/RCLK_CLEM_CLKBUF_L");                //"CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M + CLE_M/RCLK_CLEM_CLKBUF_L"
 
    //O = CLE_M_R
    setFabricChar('O', 12, "CLE_M_R");                                 //"CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R + CLE_M_R/RCLK_CLE_M_R"
 
    //P-Q are laguna tiles with different clock resources
    setFabricChar('P', 12, "LAGUNA_TILE/RCLK_RCLK_LAGUNA_L_FT");       //"LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE/RCLK_RCLK_LAGUNA_L_FT"
    setFabricChar('Q', 12, "LAGUNA_TILE/RCLK_RCLK_LAGUNA_R_FT");       //"LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE + LAGUNA_TILE/RCLK_RCLK_LAGUNA_R_FT"
 
    //a-l are I/O and misc
    setFabricChar('a', 10, "HPIO_L");                                  //"HPIO_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + HPIO_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_HPIO_L"
    setFabricChar('b', 16, "XIPHY_L");                                 //"XIPHY_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('c', 10, "HRIO_L");                                  //"HRIO_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + HRIO_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_HRIO_L"
    setFabricChar('d', 6, "INT_INTERFACE_PCIE_R");                     //"INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R + INT_INTERFACE_PCIE_R/RCLK_INTF_PCIE_R_L"
    setFabricChar('e', 2, "PCIE");                                     //"PCIE + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('f', 12, "GTH_R");                                   //"GTH_R + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('g', 2, "CFG_CFG");                                  //"CFG_CFG + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('h', 2, "CFGIO_IOB");                                //"CFGIO_IOB + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + AMS + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_AMS_CFGIO"
    setFabricChar('i', 16, "GTH_QUAD_LEFT_FT");                        //"GTH_QUAD_LEFT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('j', 12, "GTY_QUAD_LEFT_FT");                        //"GTY_QUAD_LEFT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('k', 2, "ILMAC_ILMAC_FT");                           //"ILMAC_ILMAC_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
    setFabricChar('l', 2, "CMAC_CMAC_FT");                             //"CMAC_CMAC_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
 
    //Also in the fabric exist frames that are mapped in bitstreams, but do not physically exist on the device. We encode these as follows:
    setFabricChar('0', 10, "EMPTY10", true);
    setFabricChar('1', 2, "EMPTY2", true);
    setFabricChar('2', 4, "EMPTY4/BRAM", true);
    setFabricChar('3', 6, "EMPTY6", true);
    setFabricChar('4', 12, "EMPTY12", true);
    setFabricChar('5', 16, "EMPTY16", true);
    setFabricChar('6', 58, "EMPTY58", true);
    setFabricChar('7', 4, "EMPTY4", true);
}

References setFabricChar(), and XUS_EXTRA_FRAMES_PER_ROW.

Here is the call graph for this function:

initializeResourceStringParameters()

void XilinxUltraScale::initializeResourceStringParameters ( )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 40 of file XilinxUltraScale.cpp.

                                                         {
    if(initializedResourceStringShortPartName == "")
        throw runtime_error("The target device needs to be known, before you can manipulate any bitstream!");
    if(initializedBitstreamParamsShortPartName != initializedResourceStringShortPartName){//The device is changed
        initializedBitstreamParamsShortPartName = initializedResourceStringShortPartName;
        for((numberOfCols[0] = 0, numberOfFramesBeforeCol[0][0] = 0, numberOfBRAMCols[0] = 0) ; (uint8_t)resourceString[0][numberOfCols[0]] ; numberOfCols[0]++){
            numberOfFramesBeforeCol[0][numberOfCols[0] + 1] = numberOfFramesBeforeCol[0][numberOfCols[0]] + LUT_numberOfFramesForResourceLetter[(uint8_t)resourceString[0][numberOfCols[0]]];
            numberOfBRAMsBeforeCol[0][numberOfCols[0]] = numberOfBRAMCols[0];
            if(str::iff::charIs(resourceString[0][numberOfCols[0]], 'A','B','C','D','2')) //A-D are BlockRAM columns, '2' is empty blockram column
                numberOfBRAMCols[0]++;
        }
        for(int c = numberOfCols[0] + 1 ; c < XUS_MAX_COLS ; c++){
            numberOfFramesBeforeCol[0][c] = numberOfFramesBeforeCol[0][c - 1];
        }
        for(int c = numberOfCols[0] ; c < XUS_MAX_COLS ; c++){
            numberOfBRAMsBeforeCol[0][c] = numberOfBRAMsBeforeCol[0][c - 1];
        }
        numberOfFramesPerRow[0] = numberOfFramesBeforeCol[0][numberOfCols[0]];
        numberOfWordsPerRow[0] = numberOfFramesPerRow[0] * XUS_WORDS_PER_FRAME;
        
        maxNumberOfCols = numberOfCols[0];
        maxNumberOfBRAMCols = numberOfBRAMCols[0];
        for(int r = 1 ; r < numberOfRows ; r++){
            numberOfBRAMCols[r] = numberOfBRAMCols[0];
            numberOfCols[r] = numberOfCols[0];
            numberOfFramesPerRow[r] = numberOfFramesPerRow[0];
            numberOfWordsPerRow[r] = numberOfWordsPerRow[0];
            for(int c = 0 ; c < XUS_MAX_COLS ; c++){
                numberOfFramesBeforeCol[r][c] = numberOfFramesBeforeCol[0][c];
            }
            for(int c = 0 ; c < XUS_MAX_COLS ; c++){
                numberOfBRAMsBeforeCol[r][c]  = numberOfBRAMsBeforeCol[0][c];
            }
        }
    }
}

References str::iff::charIs(), XUS_MAX_COLS, and XUS_WORDS_PER_FRAME.

Here is the call graph for this function:

merge()

void XilinxUltraScale::merge	(	XilinxUltraScale *	,
		std::string	,
		Rect2D	,
		Coord2D
	)

Definition at line 24 of file XUS_Merge.cpp.

                                                                                                  {
    log("Merging bitstreams.");
    //This function uses a pointer to the second XUSP instance, but this pointer should get optimized as it is statically provided in the main function
    parseParams(params);
    
    if(!selectedOptions.partialNotFull){
        log("Merging the whole FPGA");
        src.position = {0, 0};
        dst = {0, 0};
        src.size.row = numberOfRows * XUS_CLB_PER_CLOCK_REGION;
        src.size.col = maxNumberOfCols;
    }
    
    ensureRegionCompatibility(src, dst);
    
    if(src.position.row%XUS_CLB_PER_CLOCK_REGION != 0)
        throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUS_CLB_PER_CLOCK_REGION)).append(")."));
    if(src.size.row%XUS_CLB_PER_CLOCK_REGION != 0)
        throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUS_CLB_PER_CLOCK_REGION)).append(")."));
    if(dst.row%XUS_CLB_PER_CLOCK_REGION != 0)
        throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUS_CLB_PER_CLOCK_REGION)).append(")."));
    
    Endianness endianDifference = Endian::diff(loadedBitstreamEndianness, srcBitstream->loadedBitstreamEndianness);
    
    if((Endianness::NATIVE == endianDifference) && MergeOP::SET == selectedOptions.op)
        fastMerge(srcBitstream, src, dst);
    else
        flexiMerge(srcBitstream, endianDifference, src, dst);
    log("Merging bitstreams complete.");
}

References Coord2D::col, Endian::diff(), ensureRegionCompatibility(), fastMerge(), flexiMerge(), XilinxConfigurationAccessPort< MAX_SLRS, MAX_ROWS, MAX_COLS, MAX_BRAM_COLS, BLOCKTYPE_MAX, BLOCKTYPE_LOGIC, BLOCKTYPE_BLOCKRAM, WORDS_BEFORE_CLK, WORDS_AT_CLK, WORDS_AFTER_CLK, WORDS_PER_FRAME, FRAMES_PER_BRAM_CONTENT_COLUMN, CLB_PER_CLOCK_REGION, BRAM_PER_CLOCK_REGION, EXTRA_FRAMES_PER_ROW, FAR_ENABLE_TOP_BOTTOM_BIT, FAR_TOP_BOTTOM_BIT_SHIFT, FAR_BLOCKTYPE_SHIFT, FAR_BLOCKTYPE_MASK, FAR_ROWADDRESS_SHIFT, FAR_ROWADDRESS_MASK, FAR_COLUMNADDRESS_SHIFT, FAR_COLUMNADDRESS_MASK, FAR_MINORADDRESS_SHIFT, FAR_MINORADDRESS_MASK >::loadedBitstreamEndianness, NATIVE, parseParams(), Rect2D::position, Coord2D::row, Rect2D::size, Endian::to_string(), and XUS_CLB_PER_CLOCK_REGION.

Here is the call graph for this function:

outputBitstreamEmptySLRHeaderSequence()

void XilinxUltraScale::outputBitstreamEmptySLRHeaderSequence ( std::ofstream &  , int  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 121 of file XUS_Output.cpp.

{
    XCAP_writeNOP(fout, 132, 0, e);
    uint32_t cor0 = XCAP_getCOR0value(7, 0, 0, 0, 0, 0, 0, DONE_CYCLE::Phase4, MATCH_CYCLE::NoWait, LOCK_CYCLE::NoWait, GTS_CYCLE::Phase5, GWE_CYCLE::Phase6); // no clue where the '7' comes from (ask Vivado)
    XCAP_writeRegister(fout, XCAP::Register::COR0, cor0, e);
    //Optional Shutdown + 1 NOP ?
    XCAP_writeCommand(fout, XCAP::Command::RCRC, e);
    XCAP_writeNOP(fout, 2, 0, e);
    XCAP_writeRegister(fout, XCAP::Register::IDCODE, SLRinfo[slr].IDCODE, e);
    XCAP_writeCommand(fout, XCAP::Command::NULLCMD, e);
    
    if((slr + 1) < numberOfSLRs) { // If there are more SLRs, output the magic
        XCAP_writeSelectRegister(fout, XCAP::Register::MAGIC1, e);
        slrMagicInstrLocation[slr] = fout.tellp();
        XCAP_writeType2(fout, 0, e);
    }
}

References XCAP::COR0, XCAP::IDCODE, XCAP::MAGIC1, NoWait, XCAP::NULLCMD, Phase4, Phase5, Phase6, XCAP::RCRC, XCAP_getCOR0value(), XCAP_writeCommand(), XCAP_writeNOP(), XCAP_writeRegister(), XCAP_writeSelectRegister(), and XCAP_writeType2().

Here is the call graph for this function:

outputBitstreamEmptySLRWrapUpSequence()

void XilinxUltraScale::outputBitstreamEmptySLRWrapUpSequence ( std::ofstream &  , int  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 139 of file XUS_Output.cpp.

{
    streamoff currentStreamHead = fout.tellp();
    streamoff bypassSize = (currentStreamHead - slrMagicInstrLocation[slr])/4 - 1;
    fout.seekp(slrMagicInstrLocation[slr]);
    FileIO::write32(fout, static_cast<uint32_t>(bypassSize), e);
    fout.seekp(currentStreamHead);
    XCAP_writeNOP(fout, 16, 0, loadedBitstreamEndianness);
    XCAP_writeCommand(fout, XCAP::Command::START, loadedBitstreamEndianness);
    XCAP_writeNOP(fout, 1, 0, loadedBitstreamEndianness);
    XCAP_writeCommand(fout, XCAP::Command::DESYNC, loadedBitstreamEndianness);
    XCAP_writeNOP(fout, 16, 0, loadedBitstreamEndianness);
}

References XCAP::DESYNC, XCAP::START, FileIO::write32(), XCAP_writeCommand(), and XCAP_writeNOP().

Here is the call graph for this function:

outputBitstreamGlobalFooterSequence()

void XilinxUltraScale::outputBitstreamGlobalFooterSequence ( std::ofstream &  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 34 of file XUS_Output.cpp.

{
    XCAP_writeNOP(fout, 400, 0, loadedBitstreamEndianness);
}

References XCAP_writeNOP().

Here is the call graph for this function:

outputBitstreamGlobalHeaderSequence()

void XilinxUltraScale::outputBitstreamGlobalHeaderSequence ( std::ofstream &  , bool  , Endianness    )

overridevirtual

Written by outputBitstreamSLRHeaderAfterBitstreamSequence(), outputBitstreamEmptySLRHeaderSequence() and used by outputBitstreamSLRWrapUpSequence(), outputBitstreamEmptySLRWrapUpSequence()

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 29 of file XUS_Output.cpp.

{
    
}

outputBitstreamSLRFooterBitstreamSequence()

void XilinxUltraScale::outputBitstreamSLRFooterBitstreamSequence ( std::ofstream &  , int  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 62 of file XUS_Output.cpp.

{
    if(fullBitstream) // Add GRESTORE since it is full device bitstream.
    {
        XCAP_writeCommand(fout, XCAP::Command::GRESTORE, e);
        XCAP_writeNOP(fout, 2, 0, e);
        XCAP_writeCommand(fout, XCAP::Command::MAGIC2, e);
        XCAP_writeNOP(fout, 20, 0, e);
    }
    
    XCAP_writeNOP(fout, 1, 0, e);
    uint32_t ctrl0 = XCAP_getCTRL0value(0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0);
    XCAP_writeMaskAndRegister(fout, XCAP::Register::CTRL0, ctrl0, ctrl0, e);
    
    XCAP_writeCommand(fout, XCAP::Command::DGHIGH, e);
    XCAP_writeNOP(fout, 20, 0, e);
    
    
    XCAP_writeCommand(fout, XCAP::Command::START, e);
    XCAP_writeNOP(fout, 1, 0, e);
    
    XCAP_writeRegister(fout, XCAP::Register::FAR, XCAP_getFarFarInstruction(), e);
    XCAP_writeNOP(fout, 1, 0, e);
    XCAP_writeCommand(fout, XCAP::Command::RCRC, e);
    XCAP_writeNOP(fout, 2, 0, e);
    XCAP_writeCommand(fout, XCAP::Command::DESYNC, e);
    XCAP_writeNOP(fout, 16, 0, e);
}

References XCAP::CTRL0, XCAP::DESYNC, XCAP::DGHIGH, XCAP::FAR, XCAP::GRESTORE, XCAP::MAGIC2, XCAP::RCRC, XCAP::START, XCAP_getCTRL0value(), XCAP_getFarFarInstruction(), XCAP_writeCommand(), XCAP_writeMaskAndRegister(), XCAP_writeNOP(), and XCAP_writeRegister().

Here is the call graph for this function:

outputBitstreamSLRHeaderAfterBitstreamSequence()

void XilinxUltraScale::outputBitstreamSLRHeaderAfterBitstreamSequence ( std::ofstream &  , int  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 91 of file XUS_Output.cpp.

{
    if((slr + 1) < numberOfSLRs) { // If there are more SLRs, output the magic
        XCAP_writeNOP(fout, 400, 0, e);
        XCAP_writeSYNQ(fout, e);
        XCAP_writeNOP(fout, 1, 0, e);
        //Optional Shutdown + 1 NOP ?
        XCAP_writeCommand(fout, XCAP::Command::RCRC, e);
        XCAP_writeNOP(fout, 2, 0, e);
        
        XCAP_writeSelectRegister(fout, XCAP::Register::MAGIC1, e);
        slrMagicInstrLocation[slr] = fout.tellp();
        XCAP_writeType2(fout, 0, e);
    }
}

References XCAP::MAGIC1, XCAP::RCRC, XCAP_writeCommand(), XCAP_writeNOP(), XCAP_writeSelectRegister(), XCAP_writeSYNQ(), and XCAP_writeType2().

Here is the call graph for this function:

outputBitstreamSLRHeaderBitstreamSequence()

void XilinxUltraScale::outputBitstreamSLRHeaderBitstreamSequence ( std::ofstream &  , int  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 39 of file XUS_Output.cpp.

{
    XCAP_writeNOP(fout, 132, 0, e);
    XCAP_writeCommand(fout, XCAP::Command::RCRC, e);
    XCAP_writeNOP(fout, 2, 0, e);
    //XCAP_writeRegister(fout, XCAP::Register::MAGIC0, 0x00000000);
    XCAP_writeRegister(fout, XCAP::Register::IDCODE, SLRinfo[slr].IDCODE, e);
    uint32_t cor0 = XCAP_getCOR0value(7, 0, 0, 0, 0, 0, 0, DONE_CYCLE::Phase4, MATCH_CYCLE::NoWait, LOCK_CYCLE::NoWait, GTS_CYCLE::Phase5, GWE_CYCLE::Phase6); // no clue where the '7' comes from (ask Vivado)
    XCAP_writeRegister(fout, XCAP::Register::COR0, cor0, e);
    //XCAP_writeRegister(fout, XCAP::Register::COR1, 0x00400000);
    //XCAP_writeCommand(fout, XCAP::Command::SWITCH, e);
    //Optional Shutdown + 1 NOP ?
    XCAP_writeNOP(fout, 1, 0, e);
    XCAP_writeCommand(fout, XCAP::Command::RCRC, e);
    XCAP_writeNOP(fout, 20, 0, e);
    XCAP_writeCommand(fout, XCAP::Command::AGHIGH, e);
    XCAP_writeNOP(fout, 100, 0, e);
    XCAP_writeCommand(fout, XCAP::Command::NULLCMD, e);
    uint32_t ctrl0 = XCAP_getCTRL0value(0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0); //disable fallback bitstream, enable overwriting of LUTs
    XCAP_writeMaskAndRegister(fout, XCAP::Register::CTRL0, ctrl0, ctrl0, e);
    //XCAP_writeMaskAndRegister(fout, XCAP::Register::CTRL1, 0x20000, 0, e);// TODO: why does vivado do that? : bit at 0x20000 is undocumented
}

References XCAP::AGHIGH, XCAP::COR0, XCAP::CTRL0, XCAP::IDCODE, NoWait, XCAP::NULLCMD, Phase4, Phase5, Phase6, XCAP::RCRC, XCAP_getCOR0value(), XCAP_getCTRL0value(), XCAP_writeCommand(), XCAP_writeMaskAndRegister(), XCAP_writeNOP(), and XCAP_writeRegister().

Here is the call graph for this function:

outputBitstreamSLRWrapUpSequence()

void XilinxUltraScale::outputBitstreamSLRWrapUpSequence ( std::ofstream &  , int  , bool  , Endianness    )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 107 of file XUS_Output.cpp.

{
    streamoff currentStreamHead = fout.tellp();
    streamoff bypassSize = (currentStreamHead - slrMagicInstrLocation[slr])/4 - 1;
    fout.seekp(slrMagicInstrLocation[slr]);
    FileIO::write32(fout, static_cast<uint32_t>(bypassSize), e);
    fout.seekp(currentStreamHead);
    XCAP_writeNOP(fout, 16, 0, loadedBitstreamEndianness);
    XCAP_writeCommand(fout, XCAP::Command::START, loadedBitstreamEndianness);
    XCAP_writeNOP(fout, 1, 0, loadedBitstreamEndianness);
    XCAP_writeCommand(fout, XCAP::Command::DESYNC, loadedBitstreamEndianness);
    XCAP_writeNOP(fout, 16, 0, loadedBitstreamEndianness);
}

References XCAP::DESYNC, XCAP::START, FileIO::write32(), XCAP_writeCommand(), and XCAP_writeNOP().

Here is the call graph for this function:

readBitstream()

void XilinxUltraScale::readBitstream

(

std::string

)

Definition at line 29 of file XUS_Input.cpp.

{
    ifstream fin (filename, ifstream::binary);
    if(!fin.good())
        throw runtime_error(string("Could not open file: \"").append(filename).append("\" .\n"));
    log("Reading Xilinx UltraScale bitstream from file \"" + filename + "\"");
    
    if(str::iff::stringEndsWith(filename, ".bit"))
        readBitstreamBIT(fin);
    else if(str::iff::stringEndsWith(filename, ".bin"))
        readBitstreamBIN(fin);
    else
        throw runtime_error(string("Unknown Xilinx UltraScale file format tried to be read.\n"));
    fin.close();
    log("Xilinx UltraScale bitstream file \"" + filename + "\" read successfully.");
}

References readBitstreamBIN(), readBitstreamBIT(), and str::iff::stringEndsWith().

Here is the call graph for this function:

setDevice()

void XilinxUltraScale::setDevice ( int  , std::string  = ""  )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 142 of file XUS_Devices.cpp.

{
    clearResourceStringArrays();
    bool customNameSet = false;
    #define setCustomPartName(x) {customNameSet = true; partName = x;}
    switch(deviceID){
        //US Kintex
        #ifdef XUSKINTEX
        case XUS_DEVICE_XCKU025:
            XCKU025();
            break;
        case XUS_DEVICE_XCKU035:
            XCKU035();
            break;
        case XUS_DEVICE_XCKU040:
            XCKU040();
            break;
        case XUS_DEVICE_XCKU060:
            XCKU060();
            break;
        case XUS_DEVICE_XCKU085:
            XCKU085();
            break;
        case XUS_DEVICE_XCKU095:
            XCKU095();
            break;
        case XUS_DEVICE_XCKU115:
            XCKU115();
            break;
        #endif
        //US Virtex
        #ifdef XUSVIRTEX
        case XUS_DEVICE_XCVU065:
            XCVU065();
            break;
        case XUS_DEVICE_XCVU080:
            XCVU080();
            break;
        case XUS_DEVICE_XCVU095:
            XCVU095();
            break;
        case XUS_DEVICE_XCVU125:
            XCVU125();
            break;
        case XUS_DEVICE_XCVU160:
            XCVU160();
            break;
        case XUS_DEVICE_XCVU190:
            XCVU190();
            break;
        case XUS_DEVICE_XCVU440:
            XCVU440();
            break;
        #endif
        default:throw runtime_error("Unknown device ID.");
    }
    #undef setCustomPartName
    if(!customNameSet) // if we didn't set already a good full name
        if(customPartName != "")// if not empty string
            partName = customPartName;
    
    
    log("Initialized device resource string for \"" + initializedResourceStringShortPartName + "\"");
}

References clearResourceStringArrays(), XCKU025, XCKU035, XCKU040, XCKU060, XCKU085, XCKU095, XCKU115, XCVU065, XCVU080, XCVU095, XCVU125, XCVU160, XCVU190, XCVU440, XUS_DEVICE_XCKU025, XUS_DEVICE_XCKU035, XUS_DEVICE_XCKU040, XUS_DEVICE_XCKU060, XUS_DEVICE_XCKU085, XUS_DEVICE_XCKU095, XUS_DEVICE_XCKU115, XUS_DEVICE_XCVU065, XUS_DEVICE_XCVU080, XUS_DEVICE_XCVU095, XUS_DEVICE_XCVU125, XUS_DEVICE_XCVU160, XUS_DEVICE_XCVU190, and XUS_DEVICE_XCVU440.

Here is the call graph for this function:

setDeviceByIDCODEOrThrow()

void XilinxUltraScale::setDeviceByIDCODEOrThrow ( int  idcode )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 53 of file XUS_Devices.cpp.

                                                         {
    int deviceID = getDeviceByIDCODEorThrow(idcode);
    setDevice(deviceID);
}

setDeviceByNameOrThrow()

void XilinxUltraScale::setDeviceByNameOrThrow ( std::string  )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 48 of file XUS_Devices.cpp.

                                                        {
    int deviceID = getDeviceByNameOrThrow(name);
    setDevice(deviceID, name);
}

setDeviceByPartNameOrThrow()

void XilinxUltraScale::setDeviceByPartNameOrThrow ( )

overridevirtual

Implements XilinxConfigurationAccessPort< 3, 15, 1024, 32, 2, 0, 1, 60, 3, 60,(60+3+60), 128, 60, 12, 2, 0, 0, 23, 0x7, 17, 0x3F, 7, 0x3FF, 0, 0x7F >.

Definition at line 44 of file XUS_Devices.cpp.

                                                 {
    setDeviceByNameOrThrow(partName);
}

test()

void XilinxUltraScale::test	(	bool	usableFramesOnly,
		bool	testValueEqual,
		uint32_t	testValue
	)

Definition at line 23 of file XUS_Test.cpp.

                                                                                         {
    log("Testing bitstream against value" + to_string(testValue) + ".");
    ensureInitializedBitstreamArrays();
    ensureFramesAre(usableFramesOnly, testValueEqual, testValue);
    log("Testing finished successfully.");
}

References ensureFramesAre(), and Endian::to_string().

Here is the call graph for this function:

writeBitstream()

void XilinxUltraScale::writeBitstream	(	std::string	,
		std::string	,
		Rect2D
	)

Creates a new bitstream file and writes the selected regions in it.

• filename Name of the output file.

  Exceptions

  runtime_error

  if args don't define a correct region.

Definition at line 160 of file XUS_Output.cpp.

{
    size_t dotpos = filename.rfind(".");
    if(dotpos == string::npos)
        throw runtime_error(string("Invalid file name: \"").append(filename).append("\"!\n"));
    designName = filename.substr(0, dotpos);
    
    log("Writing Xilinx UltraScale bitstream to file \"" + filename + "\":");
    
    parseParams(params);
    
    if(selectedOptions.partialNotFull) {
        if((cmdRect.position.row % XUS_CLB_PER_CLOCK_REGION != 0) || (cmdRect.size.row % XUS_CLB_PER_CLOCK_REGION != 0))
            throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUS_CLB_PER_CLOCK_REGION)).append("."));
        if(cmdRect.size.row <= 0 || cmdRect.size.col <= 0)
            throw runtime_error("Invalid output size dimentions.");
    }
    
    ofstream fout (filename, ofstream::binary | ofstream::trunc);
    if(!fout.good())
        throw runtime_error(string("Could not open file: \"").append(filename).append("\"!\n"));
    if(str::iff::stringEndsWith(filename, ".bit"))
        writeBitstreamBIT(fout, cmdRect);
    else if(str::iff::stringEndsWith(filename, ".bin"))
        writeBitstreamBIN(fout, cmdRect);
    else
        throw runtime_error(string("Unknown Xilinx UltraScale file format tried to be written.\n"));
    fout.close();
    log("Xilinx UltraScale bitstream file \"" + filename + "\" written successfully.");
}

References Coord2D::col, parseParams(), Rect2D::position, Coord2D::row, Rect2D::size, str::iff::stringEndsWith(), Endian::to_string(), writeBitstreamBIN(), writeBitstreamBIT(), and XUS_CLB_PER_CLOCK_REGION.

Here is the call graph for this function:

Member Data Documentation

slrMagicInstrLocation

std::streamoff XilinxUltraScale::slrMagicInstrLocation[3]

Definition at line 51 of file XilinxUltraScale.h.

---

The documentation for this class was generated from the following files:

• src/Devices/Xilinx/UltraScale/XilinxUltraScale.h
• src/Devices/Xilinx/UltraScale/XilinxUltraScale.cpp
• src/Devices/Xilinx/UltraScale/XUS_Assembler.cpp
• src/Devices/Xilinx/UltraScale/XUS_Blank.cpp
• src/Devices/Xilinx/UltraScale/XUS_Change.cpp
• src/Devices/Xilinx/UltraScale/XUS_Devices.cpp
• src/Devices/Xilinx/UltraScale/XUS_Fabric.cpp
• src/Devices/Xilinx/UltraScale/XUS_Input.cpp
• src/Devices/Xilinx/UltraScale/XUS_Merge.cpp
• src/Devices/Xilinx/UltraScale/XUS_Output.cpp
• src/Devices/Xilinx/UltraScale/XUS_Test.cpp