byteman  1.3 (Build #225)
Bitstream relocation and manipulation tool
Public Member Functions | Public Attributes | List of all members
XilinxUltraScalePlus Class Reference

#include "XilinxUltraScalePlus.h"

Inheritance diagram for XilinxUltraScalePlus:
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Collaboration diagram for XilinxUltraScalePlus:
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Public Member Functions

void assembler (std::string, std::string)
 
void assemblerAsmTo (std::ifstream &, std::ofstream &)
 
void assemblerAsmToBin (std::ifstream &, std::ofstream &)
 
void assemblerAsmToBit (std::ifstream &, std::ofstream &)
 
void assemblerParseHeader (std::ifstream &)
 
void blank (std::string)
 
void change (std::string)
 
void deviceHelp ()
 
void disassemblerBinToAsm (std::string, std::ifstream &, std::ofstream &)
 
void disassemblerBitToAsm (std::ifstream &, std::ofstream &)
 
void disassemblerToAsm (std::ifstream &, std::ofstream &)
 
void disassemblerWriteHeader (std::ofstream &)
 
void ensureInitializedBitstreamArrays () override
 
int getDeviceByIDCODE (int) override
 
int getDeviceByIDCODEorThrow (int) override
 
int getDeviceByName (std::string) override
 
int getDeviceByNameOrThrow (std::string) override
 
std::string getFrameType (int, int, int) override
 
void initFabric ()
 
void initializeResourceStringParameters () override
 
void merge (XilinxUltraScalePlus *, std::string, Rect2D, Coord2D)
 
void outputBitstreamEmptySLRHeaderSequence (std::ofstream &, int, bool, Endianness) override
 
void outputBitstreamEmptySLRWrapUpSequence (std::ofstream &, int, bool, Endianness) override
 
void outputBitstreamGlobalFooterSequence (std::ofstream &, bool, Endianness) override
 
void outputBitstreamGlobalHeaderSequence (std::ofstream &, bool, Endianness) override
 Written by outputBitstreamSLRHeaderAfterBitstreamSequence(), outputBitstreamEmptySLRHeaderSequence() and used by outputBitstreamSLRWrapUpSequence(), outputBitstreamEmptySLRWrapUpSequence() More...
 
void outputBitstreamSLRFooterBitstreamSequence (std::ofstream &, int, bool, Endianness) override
 
void outputBitstreamSLRHeaderAfterBitstreamSequence (std::ofstream &, int, bool, Endianness) override
 
void outputBitstreamSLRHeaderBitstreamSequence (std::ofstream &, int, bool, Endianness) override
 
void outputBitstreamSLRWrapUpSequence (std::ofstream &, int, bool, Endianness) override
 
void readBitstream (std::string)
 
void setDevice (int, std::string="") override
 
void setDeviceByIDCODEOrThrow (int) override
 
void setDeviceByNameOrThrow (std::string) override
 
void setDeviceByPartNameOrThrow () override
 
void test (bool, bool, uint32_t)
 
void writeBitstream (std::string, std::string, Rect2D)
 
 XilinxUltraScalePlus ()
 
virtual ~XilinxUltraScalePlus ()
 
- Public Member Functions inherited from CommonDevice2D
 CommonDevice2D ()
 
void region (std::string, Rect2D)
 
virtual ~CommonDevice2D ()
 
- Public Member Functions inherited from CommonDevice
 CommonDevice ()
 
void log (std::string message)
 
void printMessage (std::string message)
 
void warn (std::string message)
 
virtual ~CommonDevice ()
 
- Public Member Functions inherited from XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >
 XilinxConfigurationAccessPort ()
 
virtual ~XilinxConfigurationAccessPort ()
 

Public Attributes

std::streamoff slrMagicInstrLocation [4]
 
- Public Attributes inherited from CommonDevice2D
std::vector< Rect2DregionSelection
 
- Public Attributes inherited from CommonDevice
int enableLog
 
int enableWarn
 
std::string instanceName
 
- Public Attributes inherited from XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >
uint32_t * bitstreamBegin
 
uint32_t * bitstreamBRAM [MAX_ROWS][MAX_BRAM_COLS]
 
uint32_t * bitstreamCLB [MAX_ROWS][MAX_COLS]
 
uint32_t * bitstreamEnd
 
bool bitstreamHasValidData
 
std::string designName
 
std::string fileDate
 
std::string fileTime
 
int fromRow
 
std::streamoff headerLocationOfRemainingFileLength
 gets set by outputBITheader() and gets used by outputBITheaderLengthField(). More...
 
uint32_t IDCODE
 
std::string initializedBitstreamParamsShortPartName
 the partName of currently initialized resource string parameters More...
 
std::string initializedBitstreamShortPartName
 The partName of currently initialized bitstream buffers. More...
 
std::string initializedResourceStringShortPartName
 the partName of currently initialized resource string parameters More...
 
Endianness loadedBitstreamEndianness
 The endianess of the currently loaded bitstream. More...
 
bool LUT_isFrameUnusedForResourceLetter [256]
 
int LUT_numberOfFramesForResourceLetter [256]
 
std::string LUT_typeOfFrameForResourceLetter [256]
 
int maxNumberOfBRAMCols
 
int maxNumberOfCols
 
int numberOfBRAMCols [MAX_ROWS]
 
int numberOfBRAMsBeforeCol [MAX_ROWS][MAX_COLS]
 
int numberOfCols [MAX_ROWS]
 
int numberOfFramesBeforeCol [MAX_ROWS][MAX_COLS]
 
int numberOfFramesPerRow [MAX_ROWS]
 
int numberOfRows
 
int numberOfSLRs
 
int numberOfWordsPerRow [MAX_ROWS]
 
std::string partName
 
char resourceString [MAX_ROWS][MAX_COLS]
 
int rowsInBottomHalf
 
int rowsInTopHalf
 
struct XilinxConfigurationAccessPort::SelectedOptions selectedOptions
 
struct {
   int   fromRow
 
   uint32_t   IDCODE
 
   int   rowsInBottomHalf
 
   int   rowsInTopHalf
 
   int   toRow
 
SLRinfo [MAX_SLRS]
 
int toRow
 

Additional Inherited Members

- Public Types inherited from XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >
enum class  MergeOP
 

Detailed Description

Definition at line 31 of file XilinxUltraScalePlus.h.

Constructor & Destructor Documentation

◆ XilinxUltraScalePlus()

XilinxUltraScalePlus::XilinxUltraScalePlus ( )

Definition at line 31 of file XilinxUltraScalePlus.cpp.

32 {
33  initFabric();
34 }

◆ ~XilinxUltraScalePlus()

XilinxUltraScalePlus::~XilinxUltraScalePlus ( )
virtual

Definition at line 36 of file XilinxUltraScalePlus.cpp.

37 {
38 }

Member Function Documentation

◆ assembler()

void XilinxUltraScalePlus::assembler ( std::string  ,
std::string   
)

Definition at line 32 of file XUSP_Assembler.cpp.

33 {
34  enum FILEFORMAT {FILE_NULL = 0, FILE_BIT, FILE_BIN, FILE_BIT_ASM};
35  FILEFORMAT fileformatIn = FILE_NULL, fileformatOut = FILE_NULL;
36 
37  if(str::iff::stringEndsWith(filenameIn, ".bit"))
38  fileformatIn = FILE_BIT;
39  if(str::iff::stringEndsWith(filenameIn, ".bin"))
40  fileformatIn = FILE_BIN;
41  if(str::iff::stringEndsWith(filenameIn, ".bitasm"))
42  fileformatIn = FILE_BIT_ASM;
43  if(str::iff::stringEndsWith(filenameOut, ".bit"))
44  fileformatOut = FILE_BIT;
45  if(str::iff::stringEndsWith(filenameOut, ".bin"))
46  fileformatOut = FILE_BIN;
47  if(str::iff::stringEndsWith(filenameOut, ".bitasm"))
48  fileformatOut = FILE_BIT_ASM;
49 
50  ifstream fin (filenameIn, ifstream::binary);
51  if(!fin.good())
52  throw runtime_error(string("Could not open file: \"").append(filenameIn).append("\" .\n"));
53 
54  ofstream fout (filenameOut, ofstream::binary | ofstream::trunc);
55  if(!fout.good())
56  throw runtime_error(string("Could not open file: \"").append(filenameOut).append("\"!\n"));
57 
58  if(fileformatIn == FILE_BIT && fileformatOut == FILE_BIT_ASM)
59  disassemblerBitToAsm(fin, fout);
60  else if(fileformatIn == FILE_BIN && fileformatOut == FILE_BIT_ASM)
61  disassemblerBinToAsm(filenameIn, fin, fout);
62  else if(fileformatIn == FILE_BIT_ASM && fileformatOut == FILE_BIT)
63  assemblerAsmToBit(fin, fout);
64  else if(fileformatIn == FILE_BIT_ASM && fileformatOut == FILE_BIN)
65  assemblerAsmToBin(fin, fout);
66  else
67  throw runtime_error(string("Unknown Xilinx US+ assembler operation between file formats. See \"byteman -h assembly\".\n"));
68  fin.close();
69  fout.close();
70 }
void disassemblerBinToAsm(std::string, std::ifstream &, std::ofstream &)
void assemblerAsmToBit(std::ifstream &, std::ofstream &)
void disassemblerBitToAsm(std::ifstream &, std::ofstream &)
void assemblerAsmToBin(std::ifstream &, std::ofstream &)
bool stringEndsWith(std::string checkedString)
Returns false. End of recursion for template.
Definition: iff.h:32

References str::iff::stringEndsWith().

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◆ assemblerAsmTo()

void XilinxUltraScalePlus::assemblerAsmTo ( std::ifstream &  ,
std::ofstream &   
)

Definition at line 125 of file XUSP_Assembler.cpp.

126 {
128 
130  int frameCount = 0;
131  int slr = 0, b = 7, r = 0, c = 0, m = 0;
132  for (string line; getline(fin, line); ) {
133  if(line.at(line.find_first_not_of(" \t")) == '#')// if #, skip that line as comment
134  continue;
135  transform(line.begin(), line.end(), line.begin(), ::toupper);
136  replace(line.begin(), line.end(), '=',' ');
137  replace(line.begin(), line.end(), '#',' ');
138  replace(line.begin(), line.end(), ',', ' ');
139  if(str::iff::stringContains(line, "SYNC") && (!str::iff::stringContains(line, "DESYNC"))){
141  }
142  else if(str::iff::stringContains(line, ".WORD")){
143  uint32_t wordValue;
144  if(!str::parse::multipleUints(line, wordValue))wordValue = 0;
145  FileIO::write32(fout, wordValue, loadedBitstreamEndianness);
146  }
147  else if(str::iff::stringContains(line, ".BYTE")){
148  uint32_t value;
149  if(!str::parse::multipleUints(line, value))value = 0;
150  uint32_t byteValue = value % 256;
151  FileIO::write8(fout, byteValue, loadedBitstreamEndianness);
152  }
153  else if(str::iff::stringContains(line, "NOP")){
154  int nopHiddenValue;
155  if(!str::parse::multipleInts(line, nopHiddenValue))nopHiddenValue = 0;
156  XCAP_writeNOP(fout, 1, nopHiddenValue, loadedBitstreamEndianness);
157  }
158  else if(str::iff::stringContains(line, "RESERVED")){
159  int reservedHiddenValue;
160  if(!str::parse::multipleInts(line, reservedHiddenValue))reservedHiddenValue = 0;
161  XCAP_writeRESERVED(fout, 1, reservedHiddenValue, loadedBitstreamEndianness);
162  }
163  else if(str::iff::stringContains(line, "SELECT NEXT SLR")){
164  slr++;
165  int magic1size;
166  if(!str::parse::multipleInts(line, magic1size))magic1size = 0;
168  XCAP_writeType2(fout, magic1size, loadedBitstreamEndianness);
169  }
170  else if(str::iff::stringContains(line, "@")){
171  XCAP::Register newRegAddr = getXCAPregister(line);
172  if(str::iff::stringContains(line, "READ REG @")){
173  int readLength;
174  if(!str::parse::multipleInts(line, readLength)) readLength = 1; // default read length is 1 if unspecified
175  XCAP_writeReadRegister(fout, newRegAddr, readLength, loadedBitstreamEndianness);
176  } else {// must be a write then ¯\_(ツ)_/¯
177 
178  if(newRegAddr == XCAP::Register::UNDEFINED){
179  throw runtime_error(string("Couldn't parse assembly command: \"").append(line).append("\"!"));
180  } else if(str::iff::stringContains(line, "SELECT REGISTER")){
182  } else if(newRegAddr == XCAP::Register::FDRI){
183  if(!str::parse::multipleInts(line, frameCount))
184  throw runtime_error(string("FDRI command needs size: \"").append(line).append("\"!"));
185  int wordCount = frameCount * XUSP_WORDS_PER_FRAME;
186  if(regAddr == XCAP::Register::FDRI) {
187  XCAP_writeType2(fout, wordCount, loadedBitstreamEndianness);
188  } else {
189  XCAP_writeFDRI1(fout, wordCount, loadedBitstreamEndianness);
190  }
191  if(frameCount > 0){
192  string frameLine;
193  for (string frameLine; getline(fin, frameLine); ) {
194  if(frameLine.at(frameLine.find_first_not_of(" \t")) == '#')// if #, skip that line as comment
195  continue;
196  uint32_t frameData[XUSP_WORDS_PER_FRAME];
197  if(!str::parse::arrayOfUints(frameLine, XUSP_WORDS_PER_FRAME, &frameData[0]))
198  throw runtime_error(string("Was expecting the data for a full frame on this line: \"").append(frameLine).append("\", because I think there are ").append(to_string(frameCount)).append(" frames left."));
199  //first 3 words are clk, next 90 are the 0-45 and 48-93 data words
200  for (int w = XUSP_WORDS_AT_CLK; w < (XUSP_WORDS_AT_CLK + XUSP_WORDS_BEFORE_CLK) ; w++){
201  FileIO::write32(fout, frameData[w], loadedBitstreamEndianness);
202  }
203  for (int w = 0; w < XUSP_WORDS_AT_CLK ; w++){
204  FileIO::write32(fout, frameData[w], loadedBitstreamEndianness);
205  }
206  for (int w = (XUSP_WORDS_AT_CLK + XUSP_WORDS_BEFORE_CLK); w < XUSP_WORDS_PER_FRAME ; w++){
207  FileIO::write32(fout, frameData[w], loadedBitstreamEndianness);
208  }
209 
210  frameCount--;
211  if(frameCount == 0)
212  break;
213  }
214  if(frameCount != 0)
215  throw runtime_error(string("End of file reached while performing FDRI frame writes.!"));
216  }
217  } else if(newRegAddr == XCAP::Register::FAR){
218  if(!str::parse::multipleInts(line, b, r, c, m))
219  throw runtime_error(string("Could not parse the new FAR value: \"").append(line).append("\"!"));
220  r += SLRinfo[slr].fromRow;
221  uint32_t farValue = XCAP_getFAR(slr, b, r, c, m);
223  } else {
224  uint32_t newValue;
225  if(!str::parse::multipleUints(line, newValue))
226  throw runtime_error(string("Could not parse the new register value: \"").append(line).append("\"!"));
227  XCAP_writeRegister(fout, newRegAddr, newValue, loadedBitstreamEndianness);
228  }
229  }
230  regAddr = newRegAddr;
231  } else {// ! str::iff::stringContains(line, "@")
232  //must have been a command then
233  XCAP::Command cmdID = getXCAPcommand(line);
234  if(cmdID == XCAP::Command::UNDEFINED)
235  throw runtime_error(string("Couldn't parse assembly command: \"").append(line).append("\"!"));
237  }
238  }
240 }
#define XUSP_WORDS_AT_CLK
Definition: XUSP_Fabric.h:37
#define XUSP_WORDS_PER_FRAME
Definition: XUSP_Fabric.h:39
#define XUSP_WORDS_BEFORE_CLK
Definition: XUSP_Fabric.h:36
void XCAP_writeRegister(std::ofstream &fout, XCAP::Register reg, int writeValue, Endianness e)
Generate the encoding for writing a CAP register and write it to file ofstream.
Definition: inlineCAP.h:382
void XCAP_writeFDRI1(std::ofstream &fout, int wordCount, Endianness e)
Generate and write only a type 1 FDRI command.
Definition: inlineCAP.h:403
XCAP::Command getXCAPcommand(std::string s)
Definition: inlineCAP.h:67
void XCAP_writeCommand(std::ofstream &fout, XCAP::Command cmd, Endianness e)
Generate the encoding for writing a CAP command and write it to file ofstream.
Definition: inlineCAP.h:390
void XCAP_writeSYNQ(std::ofstream &fout, Endianness e)
Generate and write an SYNQ command.
Definition: inlineCAP.h:436
void XCAP_writeSelectRegister(std::ofstream &fout, XCAP::Register reg, Endianness e)
Generate the encoding for "selecting" a CAP register and write it to file ofstream.
Definition: inlineCAP.h:368
void XCAP_writeRESERVED(std::ofstream &fout, int cnt, int payload, Endianness e)
Generate the encoding for Reserved instructions and write them to file ofstream.
Definition: inlineCAP.h:360
void XCAP_writeType2(std::ofstream &fout, int wordCount, Endianness e)
Generate and write only a type 2 FDRI command.
Definition: inlineCAP.h:410
void XCAP_writeNOP(std::ofstream &fout, int cnt, int payload, Endianness e)
Generate the encoding for NOP instructions and write them to file ofstream.
Definition: inlineCAP.h:352
void XCAP_writeReadRegister(std::ofstream &fout, XCAP::Register reg, int readLength, Endianness e)
Generate the encoding for reading a CAP register and write it to file ofstream.
Definition: inlineCAP.h:375
XCAP::Register getXCAPregister(std::string s)
Definition: inlineCAP.h:19
uint32_t XCAP_getFAR(int slr, int blockType, int globalRowAddress, int columnAddress, int minorAddress)
Definition: inlineFAR.h:174
void outputCAPheaderConstant(std::ofstream &fout, Endianness e)
Definition: inlineOutput.h:60
void outputBITheaderLengthField(std::ofstream &fout, Endianness e)
Definition: inlineOutput.h:52
std::string to_string(Endianness e)
Definition: Endianness.h:56
void write8(std::ofstream &fout, uint8_t writeValue, Endianness e=Endianness::NATIVE)
Definition: FileIO.h:445
void write32(std::ofstream &fout, uint32_t writeValue, Endianness e=Endianness::NATIVE)
Definition: FileIO.h:419
Register
Definition: XCAP.h:20
Command
Definition: XCAP.h:46
bool stringContains(std::string checkedString)
Returns false. End of recursion for template.
Definition: iff.h:57
bool arrayOfUints(std::string s, int arrsize, uint32_t *arr)
Removes all string words from a given string s and returns the parsed arrsize number of integers into...
Definition: parse.h:160
bool multipleUints(std::stringstream &ss)
Definition: parse.h:229
bool multipleInts(std::stringstream &ss)
Definition: parse.h:192
std::string replace(std::string str, char oldChar, char newChar)
Replaces all instances of oldChar in string str with newChar and returns the resulting string.
Definition: str.h:41

References str::parse::arrayOfUints(), XCAP::FAR, XCAP::FDRI, getXCAPcommand(), getXCAPregister(), XCAP::MAGIC1, str::parse::multipleInts(), str::parse::multipleUints(), outputBITheaderLengthField(), outputCAPheaderConstant(), str::replace(), str::iff::stringContains(), Endian::to_string(), XCAP::UNDEFINED, FileIO::write32(), FileIO::write8(), XCAP_getFAR(), XCAP_writeCommand(), XCAP_writeFDRI1(), XCAP_writeNOP(), XCAP_writeReadRegister(), XCAP_writeRegister(), XCAP_writeRESERVED(), XCAP_writeSelectRegister(), XCAP_writeSYNQ(), XCAP_writeType2(), XUSP_WORDS_AT_CLK, XUSP_WORDS_BEFORE_CLK, and XUSP_WORDS_PER_FRAME.

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◆ assemblerAsmToBin()

void XilinxUltraScalePlus::assemblerAsmToBin ( std::ifstream &  ,
std::ofstream &   
)

Definition at line 98 of file XUSP_Assembler.cpp.

98  {
100 
103 
104  assemblerAsmTo(fin, fout);
105 }
void setDeviceByPartNameOrThrow() override
void assemblerParseHeader(std::ifstream &)
void assemblerAsmTo(std::ifstream &, std::ofstream &)
void initializeResourceStringParameters() override

◆ assemblerAsmToBit()

void XilinxUltraScalePlus::assemblerAsmToBit ( std::ifstream &  ,
std::ofstream &   
)

Definition at line 89 of file XUSP_Assembler.cpp.

89  {
91 
95 
96  assemblerAsmTo(fin, fout);
97 }
void outputBITheader(std::ofstream &fout, Endianness e)
Definition: inlineOutput.h:34

References outputBITheader().

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◆ assemblerParseHeader()

void XilinxUltraScalePlus::assemblerParseHeader ( std::ifstream &  )

Definition at line 107 of file XUSP_Assembler.cpp.

108 {
109  for (string line; getline(fin, line); ) {
110  auto firstEqPos = line.find_first_of('=');
111  if(firstEqPos != string::npos)
112  line.replace(firstEqPos, 1, '=',' ');
113 
118  if(str::iff::stringContains(line, "HEADER END"))break;
119  }
120  log("Design name: " + designName);
121  log("FPGA: " + partName);
122  log("Date: " + fileDate);
123  log("Time: " + fileTime);
124 }
void log(std::string message)
Definition: CommonDevice.h:51
std::string lastStringWord(std::string s)
Parses a string s, removes all integers and returns the last of all string words.
Definition: parse.h:81

References str::parse::lastStringWord(), and str::iff::stringContains().

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◆ blank()

void XilinxUltraScalePlus::blank ( std::string  )

Definition at line 22 of file XUSP_Blank.cpp.

22  {
24  parseParams(params);
25 
26  blankBuffers();
27 }
void ensureInitializedBitstreamArrays() override
void blankBuffers()
Definition: inlineBlank.h:23
void parseParams(std::string params)

References blankBuffers(), and parseParams().

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◆ change()

void XilinxUltraScalePlus::change ( std::string  )

◆ deviceHelp()

void XilinxUltraScalePlus::deviceHelp ( )

Definition at line 1115 of file XUSP_Devices.cpp.

1116 {
1117  if(initializedResourceStringShortPartName == "") {//if no device is initialized
1118  cout << "A list of currently supported Xilinx UltraScale+ devices: " << endl;
1119  #ifdef XUSPARTIX
1120  cout << " UltraScale+ Artix: " << endl;
1121  cout << " XCAU10P, XCAU15P, XCAU20P, XCAU25P" << endl;
1122  #endif
1123  #ifdef XUSPKINTEX
1124  cout << " UltraScale+ Kintex: " << endl;
1125  cout << " XCKU3P, XQKU3P, XCKU5P, XQKU5P, XCKU9P, XQKU9P, XCKU11P, XQKU11P, XCKU13P, XQKU13P, XCKU15P, XQKU15P, XCKU19P, XQKU19P" << endl;
1126  #endif
1127  #ifdef XUSPVIRTEX
1128  cout << " UltraScale+ Virtex: " << endl;
1129  cout << " XCVU3P, XQVU3P, XCVU5P, XQVU5P, XCVU7P, XQVU7P, XCVU9P, XQVU9P, XCVU11P, XQVU11P, XCVU13P, XQVU13P, " << endl;
1130  cout << " XCVU19P, XQVU19P, XCVU23P, XQVU23P, XCVU27P, XQVU27P, XCVU29P, XQVU29P, XCVU31P, XQVU31P, XCVU33P, " << endl;
1131  cout << " XQVU33P, XCVU35P, XQVU35P, XCVU37P, XQVU37P, XCVU45P, XQVU45P, XCVU47P, XQVU47P, XCVU57P, XQVU57P" << endl;
1132  #endif
1133  #ifdef XUSPZYNQRF
1134  cout << " UltraScale+ Zynq RFSoC: " << endl;
1135  cout << " XCZU21DR, XQZU21DR, XCZU25DR, XCZU27DR, XCZU28DR, XQZU28DR, XCZU29DR, XQZU29DR, XCZU39DR, XCZU42DR, " << endl;
1136  cout << " XCZU43DR, XCZU46DR, XQZU48DR, XQZU49DR, XCZU47DR, XCZU48DR, XCZU49DR" << endl;
1137  #endif
1138  #ifdef XUSPZYNQMP
1139  cout << " UltraScale+ Zynq MPSoC: " << endl;
1140  cout << " XCZU1, XAZU1, XQZU1, XCZU2, XAZU2, XQZU2, XCZU3, XAZU3, XQZU3, XCZU4, XAZU4, XQZU4, " << endl;
1141  cout << " XCZU5, XAZU5, XQZU5, XCZU6, XAZU6, XQZU6, XCZU7, XAZU7, XQZU7, XCZU9, XAZU9, XQZU9, " << endl;
1142  cout << " XCZU11, XAZU11, XQZU11, XCZU15, XAZU15, XQZU15, XCZU17, XAZU17, XQZU17, XCZU19, XAZU19, XQZU19" << endl;
1143  #endif
1144  #ifdef XUSPALVEO
1145  cout << " UltraScale+ Alveo: " << endl;
1146  cout << " XCU200, Alveo U200, XCU250, Alveo U250, XCU26, Alveo U26, XCUX35, Alveo U35, XCU50, Alveo U50, " << endl;
1147  cout << " XCU55N, Alveo U55N, XCU55C, Alveo U55C, XCU280, Alveo U280, XCU30, Alveo U30, XCU25, Alveo U25" << endl;
1148  #endif
1149  #ifdef XUSPBOARDS
1150  cout << " Misc UltraScale+ Boards: " << endl;
1151  cout << " ZCU 102, ZU-GMSL2, ZCU104, ZCU106, AXU15EG, AXU2CG, AXU3EG, AXU4EV, AXU5EV, AXU9EG, ULTRAZED-EV, CHAMP-XD1S, ZU-3EG, " << endl;
1152  cout << " ZU-5EV, HTG-Z999-06, HTG-Z999-09, HTG-Z999-15, HTG-930-9-3, HTG-930-9, HTG-930-13-3, HTG-930-13, HTG-937-37P, HTG-937-47P, " << endl;
1153  cout << " HTG-Z922-11, HTG-Z922-19-DG, HTG-Z922-19, CZU3EG, CZU4EV, TE0802, TE0803-04-3BE11, TE0807-03-7DE21, TE0808-05-9BE21, " << endl;
1154  cout << " TE0808-05-9GI21, TE0808-05-BBE21, TE0812, TEB0911, TEB0912, TYSOM-3-ZU7EV, XPEDITE2600, AMC574, ZCU208, ZCU216, ZCU670, " << endl;
1155  cout << " Ultra96, K26C, K26I, KV260, AMC584, HTG-960, VCU1525, VCU118, VCU128, VCU129, HTG-940-9-3, HTG-940-9, HTG-940-13-3, " << endl;
1156  cout << " HTG-940-13, HTG-9200-5P, HTG-9200-9P, HTG-9200-13P, HTG-VUP-PCIE-HH-9P, HTG-910-9, HTG-VUP-PCIE-HH-13P, HTG-910-13, " << endl;
1157  cout << " HTG-ZRF-FMC-28, HTG-ZRF-FMC-48, HTG-ZRF16-29, HTG-ZRF16-49, HTG-ZRF-HH-28, HTG-ZRF-HH-48, HTG-ZUSP-PCIE-11-3, " << endl;
1158  cout << " HTG-ZUSP-PCIE-19-2, HTG-ZRF8-R2-28, HTG-ZRF8-28, HTG-ZRF8-R2-48-I, HTG-ZRF8-48-I, HTG-ZRF8-R2-48, HTG-ZRF8-48" << endl;
1159  cout << " ZUBoard 1CG, KCU 116, Vermeo T1 MPSoC, Vermeo T1 RFSoC, ZCU 1275, ZCU 1285, ZCU 111, PYNQ-ZU" << endl;
1160  #endif
1161  } else {
1163  }
1164 }
void printResourceStringInfo()

References printResourceStringInfo().

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◆ disassemblerBinToAsm()

void XilinxUltraScalePlus::disassemblerBinToAsm ( std::string  ,
std::ifstream &  ,
std::ofstream &   
)

Definition at line 72 of file XUSP_Assembler.cpp.

72  {
74  uint32_t idcode = parseBitstreamIDCODE(fin, loadedBitstreamEndianness);
76  designName = filenameIn;
78 
79  disassemblerToAsm(fin, fout);
80 }
void disassemblerToAsm(std::ifstream &, std::ofstream &)
void setDeviceByIDCODEOrThrow(int) override
Endianness parseBitstreamEndianness(std::ifstream &fin)
Definition: inlineInput.h:83
uint32_t parseBitstreamIDCODE(std::ifstream &fin, Endianness e)
Definition: inlineInput.h:181
void updateDateAndTime()
Definition: inlineOutput.h:17

References parseBitstreamEndianness(), parseBitstreamIDCODE(), and updateDateAndTime().

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◆ disassemblerBitToAsm()

void XilinxUltraScalePlus::disassemblerBitToAsm ( std::ifstream &  ,
std::ofstream &   
)

Definition at line 82 of file XUSP_Assembler.cpp.

82  {
86 
87  disassemblerToAsm(fin, fout);
88 }
void parseBITheader(std::ifstream &fin, Endianness e)
Definition: inlineInput.h:24

References parseBITheader(), and parseBitstreamEndianness().

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◆ disassemblerToAsm()

void XilinxUltraScalePlus::disassemblerToAsm ( std::ifstream &  ,
std::ofstream &   
)

Definition at line 252 of file XUSP_Assembler.cpp.

253 {
256 
258  bool synched = false;
259  bool aligned = false;
260  int wordCount = 0;
261  int shadowFrameValid = 0;
262  int slr = 0, b = 7, r = 0, c = 0, m = 0;
263  //Parse bitstream
264  for( ; ; ){
265  if(!fin.good()){
266  break; // done with the bitstream
267  } else {
268  if(!synched){
269  streamoff startFileOffset = fin.tellg();
270  streamoff endFileOffset;
271  if(!aligned){
273  endFileOffset = fin.tellg() - (streamoff)4;
274  synched = true;
275  aligned = true;
276  } else {//end of bitstream
277  endFileOffset = fin.tellg();
278  }
279  } else { //already aligned
281  endFileOffset = fin.tellg() - (streamoff)4;
282  synched = true;
283  } else {//end of bitstream
284  endFileOffset = fin.tellg();
285  }
286  }
287  fin.seekg(startFileOffset, fin.beg);
288  assemblyOutputData(fin, fout, (endFileOffset - startFileOffset));
289  if(synched){
290  FileIO::read32(fin);//discard sync command
291  fout << "SYNC" << endl;
292  } else {
293  break; //if still not synched, then we reached end of file
294  }
295  } else {
296  uint32_t instruction = FileIO::read32(fin, loadedBitstreamEndianness);
297  int instructionType = XCAP_getInstructionType(instruction);
298  XCAP::Operation instructionOPCODE = XCAP_getInstructionOperation(instruction);
299  int instructionPayload = XCAP_getInstructionPayload(instruction);
300  if(instructionType == 1) {
301  wordCount = XCAP_getInstructionWordCount(instruction);
302  regAddr = XCAP_getInstructionRegister(instruction);
303  } else if(instructionType == 2) {
304  wordCount = instructionPayload;
305  } else {
306  fout << "0x" << uppercase << hex << setw(8) << setfill('0') << instruction << " (Invalid instruction [invalid type])" << endl;
307  continue;
308  }
309 
310  if(instructionOPCODE == XCAP::Operation::NOP) {
311  if(instructionPayload != 0)
312  fout << "NOP #" << instructionPayload << endl;
313  else
314  fout << "NOP" << endl;
315  } else if(instructionOPCODE == XCAP::Operation::RESERVED) {
316  if(instructionPayload != 0)
317  fout << "RESERVED #" << instructionPayload << endl;
318  else
319  fout << "RESERVED" << endl;
320  } else if(instructionOPCODE == XCAP::Operation::READ) {
321  fout << "Read Reg @";
322  writeXCAPregisterName(fout, regAddr);
323  fout << " for length #" << wordCount << endl;
324  } else { // XCAP::Operation::WRITE
325  if((regAddr == XCAP::Register::FDRI) && (wordCount > 0) && (wordCount % XUSP_WORDS_PER_FRAME == 0)) {
326  if(shadowFrameValid) {
327  fout << dec << "# Shadow register contents are written to frame (BlockType=" << b << ", GlobalRowAddress=" << r << ", MajorAddress=" << c << ", MinorAddress=" << m << ") (Frame type: " << getFrameType(b, r, c) << ")." << endl;
328  XCAP_IncrementFAR(slr, b, r, c, m);
329  }
330  shadowFrameValid = 1;
331  int frameCount = (wordCount/XUSP_WORDS_PER_FRAME);
332  fout << dec << "@FDRI for #" << frameCount << " frames:" << endl;
333  for(int i = 0 ; i < frameCount ; i++){
334  fout << "# ";
335  if(i == (frameCount-1)) fout << "(This frame data is written to shadow register!)";
336  fout << dec << "Writing frame #" << i << " (BlockType=" << b << ", GlobalRowAddress=" << r << ", MajorAddress=" << c << ", MinorAddress=" << m << ") (Frame type: " << getFrameType(b, r, c) << ") hex data:" << endl;
337  uint32_t frameData[XUSP_WORDS_PER_FRAME];
338  for(int w = 0 ; w < XUSP_WORDS_PER_FRAME ; w++){
339  frameData[w] = FileIO::read32(fin, loadedBitstreamEndianness);
340  }
341  fout << "CLOCK: ";
343  fout << "0x" << uppercase << hex << setw(8) << setfill('0') << frameData[w] << " ";
344  }
345  fout << " ;DATA: ";
346  for(int w = 0 ; w < XUSP_WORDS_BEFORE_CLK ; w++){
347  fout << "0x" << uppercase << hex << setw(8) << setfill('0') << frameData[w] << " ";
348  }
349  for(int w = (XUSP_WORDS_BEFORE_CLK + XUSP_WORDS_AT_CLK) ; w < XUSP_WORDS_PER_FRAME ; w++){
350  fout << "0x" << uppercase << hex << setw(8) << setfill('0') << frameData[w] << " ";
351  }
352  fout << endl;
353  XCAP_IncrementFAR(slr, b, r, c, m);
354  }
355  } else if(regAddr == XCAP::Register::CMD && wordCount == 1){
356  uint32_t writeData = FileIO::read32(fin, loadedBitstreamEndianness);
357  writeXCAPcommandName(fout, static_cast<XCAP::Command>(writeData));
358  fout << ";";
359  if(XCAP::Command::DESYNC == static_cast<XCAP::Command>(writeData)){
360  shadowFrameValid = 0;
361  synched = false;
362  }
363  if(XCAP::Command::WCFG == static_cast<XCAP::Command>(writeData)){
364  shadowFrameValid = 0;
365  fout << " (also clears shadow register)";
366  }
367  fout << endl;
368  } else if(regAddr == XCAP::Register::MAGIC1){
369  uint32_t nextInstr = FileIO::read32(fin, loadedBitstreamEndianness);
370  int nextInstrType = XCAP_getInstructionType(nextInstr);
371  XCAP::Operation nextInstrOP = XCAP_getInstructionOperation(nextInstr);
372  int nextInstrPayload = XCAP_getInstructionPayload(nextInstr);
373  if(2 == nextInstrType && XCAP::Operation::WRITE == nextInstrOP && 0 < nextInstrPayload){
374  slr++;
375  synched = false;
376  aligned = false;
377  fout << "Select next SLR for the next #" << dec << nextInstrPayload << " words." << endl;
378  } else {
379  fout << "Bad MAGIC1 instruction" << endl;
380  fin.seekg(-4, ios::cur);//rewind next instruction if not
381  }
382  } else if((instructionType == 1) && (wordCount == 0)){
383  fout << "Select register @";
384  writeXCAPregisterName(fout, regAddr);
385  fout << endl;
386  } else if(wordCount == 1){
387  uint32_t writeData = FileIO::read32(fin, loadedBitstreamEndianness);
388  fout << "@";
389  writeXCAPregisterName(fout, regAddr);
390  if(regAddr == XCAP::Register::FAR) {
391  XCAP_parseFAR(writeData, slr, b, r, c, m);
392  fout << " = BlockType=" << dec << b << " RowAddress=" << (r-SLRinfo[slr].fromRow) << " MajorAddress=" << c << " MinorAddress=" << m << endl;
393  } else {
394  fout << " = 0x" << uppercase << hex << setw(8) << setfill('0') << writeData << endl;
395  }
396  } else {
397  fout << "0x" << uppercase << hex << setw(8) << setfill('0') << instruction << "(Bad instruction)" << endl;
398  }
399  } // OP_WRITE
400  }// if synched
401  } // if fin is still good
402  } // for(;;)
403 }
void disassemblerWriteHeader(std::ofstream &)
std::string getFrameType(int, int, int) override
void assemblyOutputData(std::ifstream &fin, std::ofstream &fout, std::streamoff sizeInBytes)
XCAP::Register XCAP_getInstructionRegister(uint32_t instruction)
Parses and returns instruction register. This is the register being addressed if the instruction is o...
Definition: inlineCAP.h:271
XCAP::Operation XCAP_getInstructionOperation(uint32_t instruction)
Parses and returns instruction operation. Most Xil instructions will NOP or write.
Definition: inlineCAP.h:259
uint32_t XCAP_getInstructionPayload(uint32_t instruction)
Parses and returns instruction payload. This is the immediate value after instruction type and operat...
Definition: inlineCAP.h:265
uint32_t XCAP_getInstructionWordCount(uint32_t instruction)
Parses and returns instruction word count. This is the number of words to be read/written if the inst...
Definition: inlineCAP.h:277
uint32_t XCAP_getInstructionType(uint32_t instruction)
Parses and returns instruction type. Valid Xil instructions will be of types 1 and 2.
Definition: inlineCAP.h:253
void writeXCAPcommandName(std::ofstream &fout, XCAP::Command commandID)
Definition: inlineCAP.h:111
void writeXCAPregisterName(std::ofstream &fout, XCAP::Register registerID)
Definition: inlineCAP.h:177
void XCAP_parseFAR(int farValue, int slr, int &blockType, int &globalRowAddress, int &columnAddress, int &minorAddress)
Definition: inlineFAR.h:153
void XCAP_IncrementFAR(int slrID, int &blockType, int &globalRowAddress, int &columnAddress, int &minorAddress)
Definition: inlineFAR.h:144
bool findBitstreamSyncSequence(std::ifstream &fin, Endianness e)
Definition: inlineInput.h:154
bool findBitstreamSyncWord(std::ifstream &fin, Endianness e)
Definition: inlineInput.h:131
uint32_t read32(std::ifstream &fin, Endianness e=Endianness::NATIVE)
Definition: FileIO.h:131
Operation
Definition: XCAP.h:69

References assemblyOutputData(), XCAP::CMD, XCAP::DESYNC, XCAP::FAR, XCAP::FDRI, findBitstreamSyncSequence(), findBitstreamSyncWord(), XCAP::MAGIC1, XCAP::NOP, XCAP::READ, FileIO::read32(), XCAP::RESERVED, XCAP::UNDEFINED, XCAP::WCFG, XCAP::WRITE, writeXCAPcommandName(), writeXCAPregisterName(), XCAP_getInstructionOperation(), XCAP_getInstructionPayload(), XCAP_getInstructionRegister(), XCAP_getInstructionType(), XCAP_getInstructionWordCount(), XCAP_IncrementFAR(), XCAP_parseFAR(), XUSP_WORDS_AT_CLK, XUSP_WORDS_BEFORE_CLK, and XUSP_WORDS_PER_FRAME.

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◆ disassemblerWriteHeader()

void XilinxUltraScalePlus::disassemblerWriteHeader ( std::ofstream &  )

Definition at line 242 of file XUSP_Assembler.cpp.

243 {
244  fout << "--- HEADER BEGIN ---" << endl;
245  fout << "Name = \"" << designName << "\"" << endl;
246  fout << "FPGA = \"" << partName << "\"" << endl;
247  fout << "Date = \"" << fileDate << "\"" << endl;
248  fout << "Time = \"" << fileTime << "\"" << endl;
249  fout << "--- HEADER END ---" << endl;
250 }

◆ ensureInitializedBitstreamArrays()

void XilinxUltraScalePlus::ensureInitializedBitstreamArrays ( )
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 78 of file XilinxUltraScalePlus.cpp.

78  {
80  throw runtime_error("The target device needs to be known, before you can manipulate any bitstream!");
83  if(bitstreamBegin != nullptr)
84  delete bitstreamBegin;
85 
87  //Allocate
88  int clbPlaneSize = numberOfRows * numberOfWordsPerRow[0];
90 
91  bitstreamBegin = new uint32_t[clbPlaneSize + bramPlaneSize + 100];
92 
93  //Calc pointers
94  int offset = 0;
95 
96  for(int slr = 0 ; slr < numberOfSLRs ; slr++){
97  for(int r = SLRinfo[slr].fromRow ; r <= SLRinfo[slr].toRow ; r++){
98  for(int c = 0 ; c < numberOfCols[r] ; c++){
99  bitstreamCLB[r][c] = &bitstreamBegin[offset];
101  }
102  }
103  for(int r = SLRinfo[slr].fromRow ; r <= SLRinfo[slr].toRow ; r++){
104  for(int c = 0 ; c < numberOfBRAMCols[r] ; c++){
105  bitstreamBRAM[r][c] = &bitstreamBegin[offset];
107  }
110  }
111  }
112  bitstreamEnd = &bitstreamBegin[offset];
113  bitstreamHasValidData = false;
114  log("Reserved " + to_string(clbPlaneSize + bramPlaneSize) + " words for the bitstream buffers of device \"" + partName + "\"");
115  }
116 }
#define XUSP_EXTRA_FRAMES_PER_ROW
Definition: XUSP_Fabric.h:44
#define XUSP_FRAMES_PER_BRAM_CONTENT_COLUMN
Definition: XUSP_Fabric.h:40

References Endian::to_string(), XUSP_EXTRA_FRAMES_PER_ROW, XUSP_FRAMES_PER_BRAM_CONTENT_COLUMN, and XUSP_WORDS_PER_FRAME.

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◆ getDeviceByIDCODE()

int XilinxUltraScalePlus::getDeviceByIDCODE ( int  IDCODE)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 58 of file XUSP_Devices.cpp.

59 {
60  //US+ Artix
61  #ifdef XUSPARTIX
62  if(IDCODE == XCAU10P_IDCODE)
63  return XUSP_DEVICE_XCAU10P;
64  if(IDCODE == XCAU15P_IDCODE)
65  return XUSP_DEVICE_XCAU15P;
66  if(IDCODE == XCAU20P_IDCODE)
67  return XUSP_DEVICE_XCAU20P;
68  if(IDCODE == XCAU25P_IDCODE)
69  return XUSP_DEVICE_XCAU25P;
70  #endif
71  //US+ Kintex
72  #ifdef XUSPKINTEX
73  if(IDCODE == XCKU3P_IDCODE)
74  return XUSP_DEVICE_XCKU3P;
75  if(IDCODE == XCKU5P_IDCODE)
76  return XUSP_DEVICE_XCKU5P;
77  if(IDCODE == XCKU9P_IDCODE)
78  return XUSP_DEVICE_XCKU9P;
79  if(IDCODE == XCKU11P_IDCODE)
80  return XUSP_DEVICE_XCKU11P;
81  if(IDCODE == XCKU13P_IDCODE)
82  return XUSP_DEVICE_XCKU13P;
83  if(IDCODE == XCKU15P_IDCODE)
84  return XUSP_DEVICE_XCKU15P;
85  if(IDCODE == XCKU19P_IDCODE)
86  return XUSP_DEVICE_XCKU19P;
87  #endif
88  //US+ Virtex
89  #ifdef XUSPVIRTEX
90  if(IDCODE == XCVU3P_IDCODE)
91  return XUSP_DEVICE_XCVU3P;
92  if(IDCODE == XCVU5P_IDCODE)
93  return XUSP_DEVICE_XCVU5P;
94  if(IDCODE == XCVU7P_IDCODE)
95  return XUSP_DEVICE_XCVU7P;
96  if(IDCODE == XCVU9P_IDCODE)
97  return XUSP_DEVICE_XCVU9P;
98  if(IDCODE == XCVU11P_IDCODE)
99  return XUSP_DEVICE_XCVU11P;
100  if(IDCODE == XCVU13P_IDCODE)
101  return XUSP_DEVICE_XCVU13P;
102  if(IDCODE == XCVU19P_IDCODE)
103  return XUSP_DEVICE_XCVU19P;
104  if(IDCODE == XCVU23P_IDCODE)
105  return XUSP_DEVICE_XCVU23P;
106  if(IDCODE == XCVU27P_IDCODE)
107  return XUSP_DEVICE_XCVU27P;
108  if(IDCODE == XCVU29P_IDCODE)
109  return XUSP_DEVICE_XCVU29P;
110  if(IDCODE == XCVU31P_IDCODE)
111  return XUSP_DEVICE_XCVU31P;
112  if(IDCODE == XCVU33P_IDCODE)
113  return XUSP_DEVICE_XCVU33P;
114  if(IDCODE == XCVU35P_IDCODE)
115  return XUSP_DEVICE_XCVU35P;
116  if(IDCODE == XCVU37P_IDCODE)
117  return XUSP_DEVICE_XCVU37P;
118  if(IDCODE == XCVU45P_IDCODE)
119  return XUSP_DEVICE_XCVU45P;
120  if(IDCODE == XCVU47P_IDCODE)
121  return XUSP_DEVICE_XCVU47P;
122  if(IDCODE == XCVU57P_IDCODE)
123  return XUSP_DEVICE_XCVU57P;
124  #endif
125  //US+ RFSoC
126  #ifdef XUSPZYNQRF
127  if(IDCODE == XCZU21DR_IDCODE)
128  return XUSP_DEVICE_XCZU21DR;
129  if(IDCODE == XCZU25DR_IDCODE)
130  return XUSP_DEVICE_XCZU25DR;
131  if(IDCODE == XCZU27DR_IDCODE)
132  return XUSP_DEVICE_XCZU27DR;
133  if(IDCODE == XCZU28DR_IDCODE)
134  return XUSP_DEVICE_XCZU28DR;
135  if(IDCODE == XCZU29DR_IDCODE)
136  return XUSP_DEVICE_XCZU29DR;
137  if(IDCODE == XCZU39DR_IDCODE)
138  return XUSP_DEVICE_XCZU39DR;
139  if(IDCODE == XCZU42DR_IDCODE)
140  return XUSP_DEVICE_XCZU42DR;
141  if(IDCODE == XCZU43DR_IDCODE)
142  return XUSP_DEVICE_XCZU43DR;
143  if(IDCODE == XCZU46DR_IDCODE)
144  return XUSP_DEVICE_XCZU46DR;
145  if(IDCODE == XCZU47DR_IDCODE)
146  return XUSP_DEVICE_XCZU47DR;
147  if(IDCODE == XCZU48DR_IDCODE)
148  return XUSP_DEVICE_XCZU48DR;
149  if(IDCODE == XCZU49DR_IDCODE)
150  return XUSP_DEVICE_XCZU49DR;
151  if(IDCODE == XCZU65DR_IDCODE)
152  return XUSP_DEVICE_XCZU65DR;
153  if(IDCODE == XCZU67DR_IDCODE)
154  return XUSP_DEVICE_XCZU67DR;
155  #endif
156  //US+ Zynq
157  #ifdef XUSPZYNQMP
158  if(IDCODE == XCZU1_IDCODE)
159  return XUSP_DEVICE_XCZU1;
160  if(IDCODE == XCZU2_IDCODE)
161  return XUSP_DEVICE_XCZU2;
162  if(IDCODE == XCZU3_IDCODE)
163  return XUSP_DEVICE_XCZU3;
164  if(IDCODE == XCZU4_IDCODE)
165  return XUSP_DEVICE_XCZU4;
166  if(IDCODE == XCZU5_IDCODE)
167  return XUSP_DEVICE_XCZU5;
168  if(IDCODE == XCZU6_IDCODE)
169  return XUSP_DEVICE_XCZU6;
170  if(IDCODE == XCZU7_IDCODE)
171  return XUSP_DEVICE_XCZU7;
172  if(IDCODE == XCZU9_IDCODE)
173  return XUSP_DEVICE_XCZU9;
174  if(IDCODE == XCZU11_IDCODE)
175  return XUSP_DEVICE_XCZU11;
176  if(IDCODE == XCZU15_IDCODE)
177  return XUSP_DEVICE_XCZU15;
178  if(IDCODE == XCZU17_IDCODE)
179  return XUSP_DEVICE_XCZU17;
180  if(IDCODE == XCZU19_IDCODE)
181  return XUSP_DEVICE_XCZU19;
182  #endif
183 
184 
185  //Alveo rebranding
186  #ifdef XUSPALVEO
187  if(IDCODE == XCU200_IDCODE)
188  return XUSP_DEVICE_XCU200;
189  if(IDCODE == XCU250_IDCODE)
190  return XUSP_DEVICE_XCU250;
191  if(IDCODE == XCU26_IDCODE)
192  return XUSP_DEVICE_XCU26;
193  if(IDCODE == XCUX35_IDCODE)
194  return XUSP_DEVICE_XCUX35;
195  if(IDCODE == XCU50_IDCODE)
196  return XUSP_DEVICE_XCU50;
197  if(IDCODE == XCU55N_IDCODE)
198  return XUSP_DEVICE_XCU55N;
199  if(IDCODE == XCU55C_IDCODE)
200  return XUSP_DEVICE_XCU55C;
201  if(IDCODE == XCU280_IDCODE)
202  return XUSP_DEVICE_XCU280;
203  if(IDCODE == XCU30_IDCODE)
204  return XUSP_DEVICE_XCU30;
205  if(IDCODE == XCU25_IDCODE)
206  return XUSP_DEVICE_XCU25;
207  //Kria
208  if(IDCODE == XCK26_IDCODE)
209  return XUSP_DEVICE_XCK26;
210  #endif
211  return XUSP_DEVICE_NULL;
212 }
#define XCZU48DR_IDCODE
#define XCZU65DR_IDCODE
#define XCZU4_IDCODE
Definition: XUSP_Devices.h:921
#define XCZU49DR_IDCODE
#define XCAU15P_IDCODE
Definition: XUSP_Devices.h:247
#define XCZU17_IDCODE
#define XCKU5P_IDCODE
Definition: XUSP_Devices.h:302
#define XCVU27P_IDCODE
Definition: XUSP_Devices.h:640
#define XCVU19P_IDCODE
Definition: XUSP_Devices.h:577
#define XCVU29P_IDCODE
Definition: XUSP_Devices.h:677
#define XCVU31P_IDCODE
Definition: XUSP_Devices.h:714
#define XCZU27DR_IDCODE
#define XCKU9P_IDCODE
Definition: XUSP_Devices.h:315
#define XCZU29DR_IDCODE
@ XUSP_DEVICE_XCKU13P
Definition: XUSP_Devices.h:35
@ XUSP_DEVICE_XCKU11P
Definition: XUSP_Devices.h:34
@ XUSP_DEVICE_XCZU67DR
Definition: XUSP_Devices.h:70
@ XUSP_DEVICE_XCZU49DR
Definition: XUSP_Devices.h:68
@ XUSP_DEVICE_XCVU9P
Definition: XUSP_Devices.h:42
@ XUSP_DEVICE_XCU55C
Definition: XUSP_Devices.h:91
@ XUSP_DEVICE_XCAU25P
Definition: XUSP_Devices.h:29
@ XUSP_DEVICE_XCKU5P
Definition: XUSP_Devices.h:32
@ XUSP_DEVICE_XCU50
Definition: XUSP_Devices.h:89
@ XUSP_DEVICE_XCZU25DR
Definition: XUSP_Devices.h:58
@ XUSP_DEVICE_XCZU7
Definition: XUSP_Devices.h:78
@ XUSP_DEVICE_XCZU28DR
Definition: XUSP_Devices.h:60
@ XUSP_DEVICE_XCVU45P
Definition: XUSP_Devices.h:53
@ XUSP_DEVICE_NULL
Definition: XUSP_Devices.h:24
@ XUSP_DEVICE_XCVU47P
Definition: XUSP_Devices.h:54
@ XUSP_DEVICE_XCZU21DR
Definition: XUSP_Devices.h:57
@ XUSP_DEVICE_XCZU3
Definition: XUSP_Devices.h:74
@ XUSP_DEVICE_XCVU57P
Definition: XUSP_Devices.h:55
@ XUSP_DEVICE_XCZU47DR
Definition: XUSP_Devices.h:66
@ XUSP_DEVICE_XCZU4
Definition: XUSP_Devices.h:75
@ XUSP_DEVICE_XCKU9P
Definition: XUSP_Devices.h:33
@ XUSP_DEVICE_XCVU13P
Definition: XUSP_Devices.h:44
@ XUSP_DEVICE_XCKU3P
Definition: XUSP_Devices.h:31
@ XUSP_DEVICE_XCZU42DR
Definition: XUSP_Devices.h:63
@ XUSP_DEVICE_XCU200
Definition: XUSP_Devices.h:85
@ XUSP_DEVICE_XCU26
Definition: XUSP_Devices.h:87
@ XUSP_DEVICE_XCKU15P
Definition: XUSP_Devices.h:36
@ XUSP_DEVICE_XCVU33P
Definition: XUSP_Devices.h:50
@ XUSP_DEVICE_XCVU7P
Definition: XUSP_Devices.h:41
@ XUSP_DEVICE_XCZU39DR
Definition: XUSP_Devices.h:62
@ XUSP_DEVICE_XCU55N
Definition: XUSP_Devices.h:90
@ XUSP_DEVICE_XCVU3P
Definition: XUSP_Devices.h:39
@ XUSP_DEVICE_XCVU11P
Definition: XUSP_Devices.h:43
@ XUSP_DEVICE_XCU30
Definition: XUSP_Devices.h:93
@ XUSP_DEVICE_XCVU35P
Definition: XUSP_Devices.h:51
@ XUSP_DEVICE_XCZU65DR
Definition: XUSP_Devices.h:69
@ XUSP_DEVICE_XCVU37P
Definition: XUSP_Devices.h:52
@ XUSP_DEVICE_XCU280
Definition: XUSP_Devices.h:92
@ XUSP_DEVICE_XCUX35
Definition: XUSP_Devices.h:88
@ XUSP_DEVICE_XCZU9
Definition: XUSP_Devices.h:79
@ XUSP_DEVICE_XCVU27P
Definition: XUSP_Devices.h:47
@ XUSP_DEVICE_XCZU27DR
Definition: XUSP_Devices.h:59
@ XUSP_DEVICE_XCKU19P
Definition: XUSP_Devices.h:37
@ XUSP_DEVICE_XCZU17
Definition: XUSP_Devices.h:82
@ XUSP_DEVICE_XCZU29DR
Definition: XUSP_Devices.h:61
@ XUSP_DEVICE_XCZU2
Definition: XUSP_Devices.h:73
@ XUSP_DEVICE_XCAU10P
Definition: XUSP_Devices.h:26
@ XUSP_DEVICE_XCVU5P
Definition: XUSP_Devices.h:40
@ XUSP_DEVICE_XCZU5
Definition: XUSP_Devices.h:76
@ XUSP_DEVICE_XCZU19
Definition: XUSP_Devices.h:83
@ XUSP_DEVICE_XCVU19P
Definition: XUSP_Devices.h:45
@ XUSP_DEVICE_XCU25
Definition: XUSP_Devices.h:94
@ XUSP_DEVICE_XCAU15P
Definition: XUSP_Devices.h:27
@ XUSP_DEVICE_XCAU20P
Definition: XUSP_Devices.h:28
@ XUSP_DEVICE_XCZU15
Definition: XUSP_Devices.h:81
@ XUSP_DEVICE_XCZU11
Definition: XUSP_Devices.h:80
@ XUSP_DEVICE_XCZU43DR
Definition: XUSP_Devices.h:64
@ XUSP_DEVICE_XCZU6
Definition: XUSP_Devices.h:77
@ XUSP_DEVICE_XCVU31P
Definition: XUSP_Devices.h:49
@ XUSP_DEVICE_XCZU46DR
Definition: XUSP_Devices.h:65
@ XUSP_DEVICE_XCZU1
Definition: XUSP_Devices.h:72
@ XUSP_DEVICE_XCVU29P
Definition: XUSP_Devices.h:48
@ XUSP_DEVICE_XCK26
Definition: XUSP_Devices.h:95
@ XUSP_DEVICE_XCU250
Definition: XUSP_Devices.h:86
@ XUSP_DEVICE_XCZU48DR
Definition: XUSP_Devices.h:67
@ XUSP_DEVICE_XCVU23P
Definition: XUSP_Devices.h:46
#define XCVU57P_IDCODE
Definition: XUSP_Devices.h:852
#define XCVU9P_IDCODE
Definition: XUSP_Devices.h:474
#define XCU55C_IDCODE
#define XCVU47P_IDCODE
Definition: XUSP_Devices.h:821
#define XCK26_IDCODE
#define XCZU19_IDCODE
#define XCVU45P_IDCODE
Definition: XUSP_Devices.h:797
#define XCKU11P_IDCODE
Definition: XUSP_Devices.h:331
#define XCZU67DR_IDCODE
#define XCZU21DR_IDCODE
#define XCKU15P_IDCODE
Definition: XUSP_Devices.h:364
#define XCZU1_IDCODE
Definition: XUSP_Devices.h:883
#define XCZU11_IDCODE
Definition: XUSP_Devices.h:997
#define XCZU39DR_IDCODE
#define XCVU5P_IDCODE
Definition: XUSP_Devices.h:422
#define XCZU42DR_IDCODE
#define XCZU9_IDCODE
Definition: XUSP_Devices.h:980
#define XCKU13P_IDCODE
Definition: XUSP_Devices.h:348
#define XCUX35_IDCODE
#define XCVU3P_IDCODE
Definition: XUSP_Devices.h:407
#define XCAU25P_IDCODE
Definition: XUSP_Devices.h:274
#define XCZU2_IDCODE
Definition: XUSP_Devices.h:896
#define XCVU23P_IDCODE
Definition: XUSP_Devices.h:618
#define XCZU43DR_IDCODE
#define XCAU20P_IDCODE
Definition: XUSP_Devices.h:260
#define XCZU46DR_IDCODE
#define XCU30_IDCODE
#define XCZU47DR_IDCODE
#define XCAU10P_IDCODE
Definition: XUSP_Devices.h:235
#define XCZU5_IDCODE
Definition: XUSP_Devices.h:934
#define XCU250_IDCODE
#define XCU50_IDCODE
#define XCZU15_IDCODE
#define XCU26_IDCODE
#define XCZU6_IDCODE
Definition: XUSP_Devices.h:948
#define XCZU7_IDCODE
Definition: XUSP_Devices.h:964
#define XCVU33P_IDCODE
Definition: XUSP_Devices.h:728
#define XCZU25DR_IDCODE
#define XCVU7P_IDCODE
Definition: XUSP_Devices.h:448
#define XCU25_IDCODE
#define XCU280_IDCODE
#define XCU200_IDCODE
#define XCU55N_IDCODE
#define XCVU37P_IDCODE
Definition: XUSP_Devices.h:766
#define XCZU28DR_IDCODE
#define XCVU35P_IDCODE
Definition: XUSP_Devices.h:742
#define XCKU3P_IDCODE
Definition: XUSP_Devices.h:289
#define XCVU13P_IDCODE
Definition: XUSP_Devices.h:539
#define XCVU11P_IDCODE
Definition: XUSP_Devices.h:508
#define XCZU3_IDCODE
Definition: XUSP_Devices.h:908
#define XCKU19P_IDCODE
Definition: XUSP_Devices.h:386

References XCAU10P_IDCODE, XCAU15P_IDCODE, XCAU20P_IDCODE, XCAU25P_IDCODE, XCK26_IDCODE, XCKU11P_IDCODE, XCKU13P_IDCODE, XCKU15P_IDCODE, XCKU19P_IDCODE, XCKU3P_IDCODE, XCKU5P_IDCODE, XCKU9P_IDCODE, XCU200_IDCODE, XCU250_IDCODE, XCU25_IDCODE, XCU26_IDCODE, XCU280_IDCODE, XCU30_IDCODE, XCU50_IDCODE, XCU55C_IDCODE, XCU55N_IDCODE, XCUX35_IDCODE, XCVU11P_IDCODE, XCVU13P_IDCODE, XCVU19P_IDCODE, XCVU23P_IDCODE, XCVU27P_IDCODE, XCVU29P_IDCODE, XCVU31P_IDCODE, XCVU33P_IDCODE, XCVU35P_IDCODE, XCVU37P_IDCODE, XCVU3P_IDCODE, XCVU45P_IDCODE, XCVU47P_IDCODE, XCVU57P_IDCODE, XCVU5P_IDCODE, XCVU7P_IDCODE, XCVU9P_IDCODE, XCZU11_IDCODE, XCZU15_IDCODE, XCZU17_IDCODE, XCZU19_IDCODE, XCZU1_IDCODE, XCZU21DR_IDCODE, XCZU25DR_IDCODE, XCZU27DR_IDCODE, XCZU28DR_IDCODE, XCZU29DR_IDCODE, XCZU2_IDCODE, XCZU39DR_IDCODE, XCZU3_IDCODE, XCZU42DR_IDCODE, XCZU43DR_IDCODE, XCZU46DR_IDCODE, XCZU47DR_IDCODE, XCZU48DR_IDCODE, XCZU49DR_IDCODE, XCZU4_IDCODE, XCZU5_IDCODE, XCZU65DR_IDCODE, XCZU67DR_IDCODE, XCZU6_IDCODE, XCZU7_IDCODE, XCZU9_IDCODE, XUSP_DEVICE_NULL, XUSP_DEVICE_XCAU10P, XUSP_DEVICE_XCAU15P, XUSP_DEVICE_XCAU20P, XUSP_DEVICE_XCAU25P, XUSP_DEVICE_XCK26, XUSP_DEVICE_XCKU11P, XUSP_DEVICE_XCKU13P, XUSP_DEVICE_XCKU15P, XUSP_DEVICE_XCKU19P, XUSP_DEVICE_XCKU3P, XUSP_DEVICE_XCKU5P, XUSP_DEVICE_XCKU9P, XUSP_DEVICE_XCU200, XUSP_DEVICE_XCU25, XUSP_DEVICE_XCU250, XUSP_DEVICE_XCU26, XUSP_DEVICE_XCU280, XUSP_DEVICE_XCU30, XUSP_DEVICE_XCU50, XUSP_DEVICE_XCU55C, XUSP_DEVICE_XCU55N, XUSP_DEVICE_XCUX35, XUSP_DEVICE_XCVU11P, XUSP_DEVICE_XCVU13P, XUSP_DEVICE_XCVU19P, XUSP_DEVICE_XCVU23P, XUSP_DEVICE_XCVU27P, XUSP_DEVICE_XCVU29P, XUSP_DEVICE_XCVU31P, XUSP_DEVICE_XCVU33P, XUSP_DEVICE_XCVU35P, XUSP_DEVICE_XCVU37P, XUSP_DEVICE_XCVU3P, XUSP_DEVICE_XCVU45P, XUSP_DEVICE_XCVU47P, XUSP_DEVICE_XCVU57P, XUSP_DEVICE_XCVU5P, XUSP_DEVICE_XCVU7P, XUSP_DEVICE_XCVU9P, XUSP_DEVICE_XCZU1, XUSP_DEVICE_XCZU11, XUSP_DEVICE_XCZU15, XUSP_DEVICE_XCZU17, XUSP_DEVICE_XCZU19, XUSP_DEVICE_XCZU2, XUSP_DEVICE_XCZU21DR, XUSP_DEVICE_XCZU25DR, XUSP_DEVICE_XCZU27DR, XUSP_DEVICE_XCZU28DR, XUSP_DEVICE_XCZU29DR, XUSP_DEVICE_XCZU3, XUSP_DEVICE_XCZU39DR, XUSP_DEVICE_XCZU4, XUSP_DEVICE_XCZU42DR, XUSP_DEVICE_XCZU43DR, XUSP_DEVICE_XCZU46DR, XUSP_DEVICE_XCZU47DR, XUSP_DEVICE_XCZU48DR, XUSP_DEVICE_XCZU49DR, XUSP_DEVICE_XCZU5, XUSP_DEVICE_XCZU6, XUSP_DEVICE_XCZU65DR, XUSP_DEVICE_XCZU67DR, XUSP_DEVICE_XCZU7, and XUSP_DEVICE_XCZU9.

◆ getDeviceByIDCODEorThrow()

int XilinxUltraScalePlus::getDeviceByIDCODEorThrow ( int  IDCODE)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 28 of file XUSP_Devices.cpp.

29 {
30  int deviceID = getDeviceByIDCODE(IDCODE);
31  if(deviceID == XUSP_DEVICE_NULL)
32  throw runtime_error(string("Unknown device with IDCODE = ").append(to_string(IDCODE)).append(" . Maybe the device is not Xilinx US+ device?"));
33  return deviceID;
34 }
int getDeviceByIDCODE(int) override

References Endian::to_string(), and XUSP_DEVICE_NULL.

Here is the call graph for this function:

◆ getDeviceByName()

int XilinxUltraScalePlus::getDeviceByName ( std::string  )
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 213 of file XUSP_Devices.cpp.

214 {
215  name = str::removeSpaces(name);
216  name = str::stringToLower(name);
217 
218  //US+ Artix
219  #ifdef XUSPARTIX
221  return XUSP_DEVICE_XCAU10P;
223  return XUSP_DEVICE_XCAU15P;
225  return XUSP_DEVICE_XCAU20P;
227  return XUSP_DEVICE_XCAU25P;
228  #endif
229 
230  //US+ Kintex
231  #ifdef XUSPKINTEX
232  if(str::iff::stringContains(name, XCKU3P_NAME, "xqku3p"))
233  return XUSP_DEVICE_XCKU3P;
234  if(str::iff::stringContains(name, XCKU5P_NAME, "xqku5p"))
235  return XUSP_DEVICE_XCKU5P;
236  if(str::iff::stringContains(name, XCKU9P_NAME, "xqku9p"))
237  return XUSP_DEVICE_XCKU9P;
238  if(str::iff::stringContains(name, XCKU11P_NAME, "xqku11p"))
239  return XUSP_DEVICE_XCKU11P;
240  if(str::iff::stringContains(name, XCKU13P_NAME, "xqku13p"))
241  return XUSP_DEVICE_XCKU13P;
242  if(str::iff::stringContains(name, XCKU15P_NAME, "xqku15p"))
243  return XUSP_DEVICE_XCKU15P;
244  if(str::iff::stringContains(name, XCKU19P_NAME, "xqku19p"))
245  return XUSP_DEVICE_XCKU19P;
246  #endif
247 
248  //US+ Virtex
249  #ifdef XUSPVIRTEX
250  if(str::iff::stringContains(name, XCVU3P_NAME, "xqvu3p"))
251  return XUSP_DEVICE_XCVU3P;
252  if(str::iff::stringContains(name, XCVU5P_NAME, "xqvu5p"))
253  return XUSP_DEVICE_XCVU5P;
254  if(str::iff::stringContains(name, XCVU7P_NAME, "xqvu7p"))
255  return XUSP_DEVICE_XCVU7P;
256  if(str::iff::stringContains(name, XCVU9P_NAME, "xqvu9p"))
257  return XUSP_DEVICE_XCVU9P;
258  if(str::iff::stringContains(name, XCVU11P_NAME, "xqvu11p"))
259  return XUSP_DEVICE_XCVU11P;
260  if(str::iff::stringContains(name, XCVU13P_NAME, "xqvu13p"))
261  return XUSP_DEVICE_XCVU13P;
262  if(str::iff::stringContains(name, XCVU19P_NAME, "xqvu19p"))
263  return XUSP_DEVICE_XCVU19P;
264  if(str::iff::stringContains(name, XCVU23P_NAME, "xqvu23p"))
265  return XUSP_DEVICE_XCVU23P;
266  if(str::iff::stringContains(name, XCVU27P_NAME, "xqvu27p"))
267  return XUSP_DEVICE_XCVU27P;
268  if(str::iff::stringContains(name, XCVU29P_NAME, "xqvu29p"))
269  return XUSP_DEVICE_XCVU29P;
270  if(str::iff::stringContains(name, XCVU31P_NAME, "xqvu31p"))
271  return XUSP_DEVICE_XCVU31P;
272  if(str::iff::stringContains(name, XCVU33P_NAME, "xqvu33p"))
273  return XUSP_DEVICE_XCVU33P;
274  if(str::iff::stringContains(name, XCVU35P_NAME, "xqvu35p"))
275  return XUSP_DEVICE_XCVU35P;
276  if(str::iff::stringContains(name, XCVU37P_NAME, "xqvu37p"))
277  return XUSP_DEVICE_XCVU37P;
278  if(str::iff::stringContains(name, XCVU45P_NAME, "xqvu45p"))
279  return XUSP_DEVICE_XCVU45P;
280  if(str::iff::stringContains(name, XCVU47P_NAME, "xqvu47p"))
281  return XUSP_DEVICE_XCVU47P;
282  if(str::iff::stringContains(name, XCVU57P_NAME, "xqvu57p"))
283  return XUSP_DEVICE_XCVU57P;
284  #endif
285 
286  //US+ RFSoC (RFSOC BEFORE MPSOC, since names collide!)
287  #ifdef XUSPZYNQRF
288  if(str::iff::stringContains(name, XCZU21DR_NAME, "xqzu21dr"))
289  return XUSP_DEVICE_XCZU21DR;
291  return XUSP_DEVICE_XCZU25DR;
293  return XUSP_DEVICE_XCZU27DR;
294  if(str::iff::stringContains(name, XCZU28DR_NAME, "xqzu28dr"))
295  return XUSP_DEVICE_XCZU28DR;
296  if(str::iff::stringContains(name, XCZU29DR_NAME, "xqzu29dr"))
297  return XUSP_DEVICE_XCZU29DR;
299  return XUSP_DEVICE_XCZU39DR;
301  return XUSP_DEVICE_XCZU42DR;
303  return XUSP_DEVICE_XCZU43DR;
304  if(str::iff::stringContains(name, XCZU46DR_NAME, "xqzu48dr", "xqzu49dr"))
305  return XUSP_DEVICE_XCZU46DR; // Yes, this row is correct.
307  return XUSP_DEVICE_XCZU47DR;
309  return XUSP_DEVICE_XCZU48DR;
311  return XUSP_DEVICE_XCZU49DR;
313  return XUSP_DEVICE_XCZU65DR;
315  return XUSP_DEVICE_XCZU67DR;
316  #endif
317 
318  //US+ Zynq
319  #ifdef XUSPZYNQMP
320  if(str::iff::stringContains(name, XCZU2_NAME, "xazu2", "xqzu2"))
321  return XUSP_DEVICE_XCZU2;
322  if(str::iff::stringContains(name, XCZU3_NAME, "xazu3", "xqzu3"))
323  return XUSP_DEVICE_XCZU3;
324  if(str::iff::stringContains(name, XCZU4_NAME, "xazu4", "xqzu4"))
325  return XUSP_DEVICE_XCZU4;
326  if(str::iff::stringContains(name, XCZU5_NAME, "xazu5", "xqzu5"))
327  return XUSP_DEVICE_XCZU5;
328  if(str::iff::stringContains(name, XCZU6_NAME, "xazu6", "xqzu6"))
329  return XUSP_DEVICE_XCZU6;
330  if(str::iff::stringContains(name, XCZU7_NAME, "xazu7", "xqzu7"))
331  return XUSP_DEVICE_XCZU7;
332  if(str::iff::stringContains(name, XCZU9_NAME, "xazu9", "xqzu9"))
333  return XUSP_DEVICE_XCZU9;
334  if(str::iff::stringContains(name, XCZU11_NAME, "xazu11", "xqzu11"))
335  return XUSP_DEVICE_XCZU11;
336  if(str::iff::stringContains(name, XCZU15_NAME, "xazu15", "xqzu15"))
337  return XUSP_DEVICE_XCZU15;
338  if(str::iff::stringContains(name, XCZU17_NAME, "xazu17", "xqzu17"))
339  return XUSP_DEVICE_XCZU17;
340  if(str::iff::stringContains(name, XCZU19_NAME, "xazu19", "xqzu19"))
341  return XUSP_DEVICE_XCZU19;
342  if(str::iff::stringContains(name, XCZU1_NAME, "xazu1", "xqzu1"))
343  return XUSP_DEVICE_XCZU1;
344  #endif
345 
346  //Alveo rebranding
347  #ifdef XUSPALVEO
348  if(str::iff::stringContains(name, XCU200_NAME, "alveou200"))
349  return XUSP_DEVICE_XCU200;
350  if(str::iff::stringContains(name, XCU250_NAME, "alveou250"))
351  return XUSP_DEVICE_XCU250;
352  if(str::iff::stringContains(name, XCU26_NAME, "alveou26"))
353  return XUSP_DEVICE_XCU26;
354  if(str::iff::stringContains(name, XCUX35_NAME, "alveou35"))
355  return XUSP_DEVICE_XCUX35;
356  if(str::iff::stringContains(name, XCU50_NAME, "alveou50"))
357  return XUSP_DEVICE_XCU50;
358  if(str::iff::stringContains(name, XCU55N_NAME, "alveou55n"))
359  return XUSP_DEVICE_XCU55N;
360  if(str::iff::stringContains(name, XCU55C_NAME, "alveou55c"))
361  return XUSP_DEVICE_XCU55C;
362  if(str::iff::stringContains(name, XCU280_NAME, "alveou280"))
363  return XUSP_DEVICE_XCU280;
364  if(str::iff::stringContains(name, XCU30_NAME, "alveou30"))
365  return XUSP_DEVICE_XCU30;
366  if(str::iff::stringContains(name, XCU25_NAME, "alveou25"))
367  return XUSP_DEVICE_XCU25;
368  //Kria
370  return XUSP_DEVICE_XCK26;
371  if(str::iff::stringContains(name, "k26c", "kria26c"))
372  return XUSP_DEVICE_K26C;
373  if(str::iff::stringContains(name, "k26i", "kria26i"))
374  return XUSP_DEVICE_K26I;
375  if(str::iff::stringContains(name, "kv260"))
376  return XUSP_DEVICE_KV260;
377  #endif
378 
379  //Some boards for easier use
380  #ifdef XUSPBOARDS
381  if(str::iff::stringContains(name, "pynqzu", "pynq-zu"))
382  return XUSP_DEVICE_PYNQ_ZU;
383  if(str::iff::stringContains(name, "zcu102", "zu-gmsl2"))
384  return XUSP_DEVICE_ZCU102;
385  if(str::iff::stringContains(name, "zcu104"))
386  return XUSP_DEVICE_ZCU104;
387  if(str::iff::stringContains(name, "zcu106"))
388  return XUSP_DEVICE_ZCU106;
389  if(str::iff::stringContains(name, "axu15eg"))
390  return XUSP_DEVICE_AXU15EG;
391  if(str::iff::stringContains(name, "axu2cg"))
392  return XUSP_DEVICE_AXU2CG;
393  if(str::iff::stringContains(name, "axu3eg"))
394  return XUSP_DEVICE_AXU3EG;
395  if(str::iff::stringContains(name, "axu4ev"))
396  return XUSP_DEVICE_AXU4EV;
397  if(str::iff::stringContains(name, "axu5ev"))
398  return XUSP_DEVICE_AXU5EV;
399  if(str::iff::stringContains(name, "axu9eg"))
400  return XUSP_DEVICE_AXU9EG;
401  if(str::iff::stringContains(name, "ultrazed-ev"))
403  if(str::iff::stringContains(name, "champ-xd1s"))
404  return XUSP_DEVICE_CHAMP_XD1S;
405  if(str::iff::stringContains(name, "zu-3eg"))
406  return XUSP_DEVICE_ZU_3EG;
407  if(str::iff::stringContains(name, "zu-5ev"))
408  return XUSP_DEVICE_ZU_5EV;
409  if(str::iff::stringContains(name, "htg-z999-06"))
411  if(str::iff::stringContains(name, "htg-z999-09"))
413  if(str::iff::stringContains(name, "htg-z999-15"))
415  if(str::iff::stringContains(name, "htg-930-9-3"))
417  if(str::iff::stringContains(name, "htg-930-9"))
418  return XUSP_DEVICE_HTG_930_9;
419  if(str::iff::stringContains(name, "htg-930-13-3"))
421  if(str::iff::stringContains(name, "htg-930-13"))
422  return XUSP_DEVICE_HTG_930_13;
423  if(str::iff::stringContains(name, "htg-937-37p"))
425  if(str::iff::stringContains(name, "htg-937-47p"))
427  if(str::iff::stringContains(name, "htg-z922-11"))
429  if(str::iff::stringContains(name, "htg-z922-19-dg"))
431  if(str::iff::stringContains(name, "htg-z922-19"))
433  if(str::iff::stringContains(name, "czu3eg"))
434  return XUSP_DEVICE_CZU3EG;
435  if(str::iff::stringContains(name, "czu4ev"))
436  return XUSP_DEVICE_CZU4EV;
437  if(str::iff::stringContains(name, "te0802"))
438  return XUSP_DEVICE_TE0802;
439  if(str::iff::stringContains(name, "te0803-04-3be11"))
441  if(str::iff::stringContains(name, "te0807-03-7de21"))
443  if(str::iff::stringContains(name, "te0808-05-9be21"))
445  if(str::iff::stringContains(name, "te0808-05-9gi21"))
447  if(str::iff::stringContains(name, "te0808-05-bbe21"))
449  if(str::iff::stringContains(name, "te0812"))
450  return XUSP_DEVICE_TE0812;
451  if(str::iff::stringContains(name, "teb0911"))
452  return XUSP_DEVICE_TEB0911;
453  if(str::iff::stringContains(name, "teb0912"))
454  return XUSP_DEVICE_TEB0912;
455  if(str::iff::stringContains(name, "tysom-3-zu7ev"))
457  if(str::iff::stringContains(name, "xpedite2600"))
459  if(str::iff::stringContains(name, "amc574"))
460  return XUSP_DEVICE_AMC574;
461  if(str::iff::stringContains(name, "zcu208"))
462  return XUSP_DEVICE_ZCU208;
463  if(str::iff::stringContains(name, "zcu216"))
464  return XUSP_DEVICE_ZCU216;
465  if(str::iff::stringContains(name, "zcu670"))
466  return XUSP_DEVICE_ZCU670;
467  if(str::iff::stringContains(name, "ultra96"))
468  return XUSP_DEVICE_ULTRA96;
469  if(str::iff::stringContains(name, "amc584"))
470  return XUSP_DEVICE_AMC584;
471  if(str::iff::stringContains(name, "htg-960"))
472  return XUSP_DEVICE_HTG_960;
473  if(str::iff::stringContains(name, "vcu1525"))
474  return XUSP_DEVICE_VCU1525;
475  if(str::iff::stringContains(name, "vcu118"))
476  return XUSP_DEVICE_VCU118;
477  if(str::iff::stringContains(name, "vcu128"))
478  return XUSP_DEVICE_VCU128;
479  if(str::iff::stringContains(name, "vcu129"))
480  return XUSP_DEVICE_VCU129;
481  if(str::iff::stringContains(name, "htg-940-9-3"))
483  if(str::iff::stringContains(name, "htg-940-9"))
484  return XUSP_DEVICE_HTG_940_9;
485  if(str::iff::stringContains(name, "htg-940-13-3"))
487  if(str::iff::stringContains(name, "htg-940-13"))
488  return XUSP_DEVICE_HTG_940_13;
489  if(str::iff::stringContains(name, "htg-9200-5p"))
491  if(str::iff::stringContains(name, "htg-9200-9p"))
493  if(str::iff::stringContains(name, "htg-9200-13p"))
495  if(str::iff::stringContains(name, "htg-vup-pcie-hh-9p", "htg-910-9"))
497  if(str::iff::stringContains(name, "htg-vup-pcie-hh-13p", "htg-910-13"))
499  if(str::iff::stringContains(name, "htg-zrf-fmc-28"))
501  if(str::iff::stringContains(name, "htg-zrf-fmc-48"))
503  if(str::iff::stringContains(name, "htg-zrf16-29"))
505  if(str::iff::stringContains(name, "htg-zrf16-49"))
507  if(str::iff::stringContains(name, "htg-zrf-hh-28"))
509  if(str::iff::stringContains(name, "htg-zrf-hh-48"))
511  if(str::iff::stringContains(name, "htg-zusp-pcie-11-3"))
513  if(str::iff::stringContains(name, "htg-zusp-pcie-19-2"))
515  if(str::iff::stringContains(name, "htg-zrf8-r2-28", "htg-zrf8-28"))
517  if(str::iff::stringContains(name, "htg-zrf8-r2-48-I", "htg-zrf8-48-i"))
519  if(str::iff::stringContains(name, "htg-zrf8-r2-48", "htg-zrf8-48"))
521  if(str::iff::stringContains(name, "zuboard1cg"))
523  if(str::iff::stringContains(name, "kcu116"))
524  return XUSP_DEVICE_KCU116;
525  if(str::iff::stringContains(name, "vermeot1mp"))
527  if(str::iff::stringContains(name, "vermeot1rf"))
529  if(str::iff::stringContains(name, "zcu1275"))
530  return XUSP_DEVICE_ZCU1275;
531  if(str::iff::stringContains(name, "zcu1285"))
532  return XUSP_DEVICE_ZCU1285;
533  if(str::iff::stringContains(name, "zcu111"))
534  return XUSP_DEVICE_ZCU111;
535  if(str::iff::stringContains(name, "genesyszu-5ev", "genesyszu5ev", "genesys-5ev", "genesys5ev"))
537  if(str::iff::stringContains(name, "genesyszu-3eg", "genesyszu3eg", "genesys-3eg", "genesys3eg"))
539  #endif
540  return XUSP_DEVICE_NULL;
541 }
#define XCZU27DR_NAME
#define XCZU1_NAME
Definition: XUSP_Devices.h:880
#define XCZU28DR_NAME
#define XCU55N_NAME
#define XCKU15P_NAME
Definition: XUSP_Devices.h:361
#define XCVU3P_NAME
Definition: XUSP_Devices.h:404
#define XCZU15_NAME
#define XCAU15P_NAME
Definition: XUSP_Devices.h:244
#define XCVU47P_NAME
Definition: XUSP_Devices.h:818
#define XCAU10P_NAME
Definition: XUSP_Devices.h:232
#define XCAU25P_NAME
Definition: XUSP_Devices.h:271
#define XCKU3P_NAME
Definition: XUSP_Devices.h:286
#define XCZU48DR_NAME
#define XCZU42DR_NAME
#define XCVU19P_NAME
Definition: XUSP_Devices.h:574
#define XCKU19P_NAME
Definition: XUSP_Devices.h:383
#define XCKU13P_NAME
Definition: XUSP_Devices.h:345
@ XUSP_DEVICE_ZU_5EV
Definition: XUSP_Devices.h:113
@ XUSP_DEVICE_HTG_940_13
Definition: XUSP_Devices.h:153
@ XUSP_DEVICE_HTG_VUP_PCIE_HH_13P
Definition: XUSP_Devices.h:158
@ XUSP_DEVICE_ZCU208
Definition: XUSP_Devices.h:140
@ XUSP_DEVICE_ZU_3EG
Definition: XUSP_Devices.h:112
@ XUSP_DEVICE_HTG_960
Definition: XUSP_Devices.h:145
@ XUSP_DEVICE_ZCU670
Definition: XUSP_Devices.h:142
@ XUSP_DEVICE_HTG_Z999_15
Definition: XUSP_Devices.h:116
@ XUSP_DEVICE_K26C
Definition: XUSP_Devices.h:96
@ XUSP_DEVICE_HTG_930_13
Definition: XUSP_Devices.h:120
@ XUSP_DEVICE_TEB0911
Definition: XUSP_Devices.h:135
@ XUSP_DEVICE_VCU128
Definition: XUSP_Devices.h:148
@ XUSP_DEVICE_AMC574
Definition: XUSP_Devices.h:139
@ XUSP_DEVICE_AXU15EG
Definition: XUSP_Devices.h:104
@ XUSP_DEVICE_HTG_Z999_09
Definition: XUSP_Devices.h:115
@ XUSP_DEVICE_VERMEO_T1_MP
Definition: XUSP_Devices.h:172
@ XUSP_DEVICE_TE0808_05_9BE21
Definition: XUSP_Devices.h:131
@ XUSP_DEVICE_ZCU102
Definition: XUSP_Devices.h:101
@ XUSP_DEVICE_K26I
Definition: XUSP_Devices.h:97
@ XUSP_DEVICE_ZCU106
Definition: XUSP_Devices.h:103
@ XUSP_DEVICE_AXU5EV
Definition: XUSP_Devices.h:108
@ XUSP_DEVICE_HTG_9200_9P
Definition: XUSP_Devices.h:155
@ XUSP_DEVICE_VERMEO_T1_RF
Definition: XUSP_Devices.h:173
@ XUSP_DEVICE_HTG_ZRF8_R2_28
Definition: XUSP_Devices.h:167
@ XUSP_DEVICE_HTG_ZRF16_29
Definition: XUSP_Devices.h:161
@ XUSP_DEVICE_AXU4EV
Definition: XUSP_Devices.h:107
@ XUSP_DEVICE_VCU118
Definition: XUSP_Devices.h:147
@ XUSP_DEVICE_HTG_Z922_11
Definition: XUSP_Devices.h:123
@ XUSP_DEVICE_HTG_9200_5P
Definition: XUSP_Devices.h:154
@ XUSP_DEVICE_AMC584
Definition: XUSP_Devices.h:144
@ XUSP_DEVICE_KCU116
Definition: XUSP_Devices.h:171
@ XUSP_DEVICE_HTG_940_13_3
Definition: XUSP_Devices.h:152
@ XUSP_DEVICE_TYSOM_3_ZU7EV
Definition: XUSP_Devices.h:137
@ XUSP_DEVICE_HTG_ZRF8_R2_48
Definition: XUSP_Devices.h:169
@ XUSP_DEVICE_HTG_930_9_3
Definition: XUSP_Devices.h:117
@ XUSP_DEVICE_HTG_930_13_3
Definition: XUSP_Devices.h:119
@ XUSP_DEVICE_HTG_ZRF16_49
Definition: XUSP_Devices.h:162
@ XUSP_DEVICE_HTG_ZUSP_PCIE_11_3
Definition: XUSP_Devices.h:165
@ XUSP_DEVICE_GENESYS_3EG
Definition: XUSP_Devices.h:178
@ XUSP_DEVICE_HTG_940_9_3
Definition: XUSP_Devices.h:150
@ XUSP_DEVICE_TE0808_05_9GI21
Definition: XUSP_Devices.h:132
@ XUSP_DEVICE_TE0802
Definition: XUSP_Devices.h:128
@ XUSP_DEVICE_HTG_ZRF_FMC_28
Definition: XUSP_Devices.h:159
@ XUSP_DEVICE_HTG_Z922_19_DG
Definition: XUSP_Devices.h:124
@ XUSP_DEVICE_TEB0912
Definition: XUSP_Devices.h:136
@ XUSP_DEVICE_VCU1525
Definition: XUSP_Devices.h:146
@ XUSP_DEVICE_HTG_Z999_06
Definition: XUSP_Devices.h:114
@ XUSP_DEVICE_ZCU111
Definition: XUSP_Devices.h:176
@ XUSP_DEVICE_HTG_9200_13P
Definition: XUSP_Devices.h:156
@ XUSP_DEVICE_ZCU104
Definition: XUSP_Devices.h:102
@ XUSP_DEVICE_HTG_VUP_PCIE_HH_9P
Definition: XUSP_Devices.h:157
@ XUSP_DEVICE_HTG_Z922_19
Definition: XUSP_Devices.h:125
@ XUSP_DEVICE_AXU2CG
Definition: XUSP_Devices.h:105
@ XUSP_DEVICE_CZU4EV
Definition: XUSP_Devices.h:127
@ XUSP_DEVICE_HTG_937_47P
Definition: XUSP_Devices.h:122
@ XUSP_DEVICE_VCU129
Definition: XUSP_Devices.h:149
@ XUSP_DEVICE_HTG_ZRF_HH_48
Definition: XUSP_Devices.h:164
@ XUSP_DEVICE_CZU3EG
Definition: XUSP_Devices.h:126
@ XUSP_DEVICE_ULTRAZED_EV
Definition: XUSP_Devices.h:110
@ XUSP_DEVICE_TE0812
Definition: XUSP_Devices.h:134
@ XUSP_DEVICE_ZUBOARD_1CG
Definition: XUSP_Devices.h:170
@ XUSP_DEVICE_AXU9EG
Definition: XUSP_Devices.h:109
@ XUSP_DEVICE_TE0808_05_BBE21
Definition: XUSP_Devices.h:133
@ XUSP_DEVICE_HTG_937_37P
Definition: XUSP_Devices.h:121
@ XUSP_DEVICE_TE0803_04_3BE11
Definition: XUSP_Devices.h:129
@ XUSP_DEVICE_PYNQ_ZU
Definition: XUSP_Devices.h:100
@ XUSP_DEVICE_XPEDITE2600
Definition: XUSP_Devices.h:138
@ XUSP_DEVICE_GENESYS_5EV
Definition: XUSP_Devices.h:177
@ XUSP_DEVICE_HTG_930_9
Definition: XUSP_Devices.h:118
@ XUSP_DEVICE_ZCU216
Definition: XUSP_Devices.h:141
@ XUSP_DEVICE_KV260
Definition: XUSP_Devices.h:98
@ XUSP_DEVICE_AXU3EG
Definition: XUSP_Devices.h:106
@ XUSP_DEVICE_HTG_ZRF_FMC_48
Definition: XUSP_Devices.h:160
@ XUSP_DEVICE_HTG_ZRF8_R2_48_I
Definition: XUSP_Devices.h:168
@ XUSP_DEVICE_ZCU1285
Definition: XUSP_Devices.h:175
@ XUSP_DEVICE_HTG_ZUSP_PCIE_19_2
Definition: XUSP_Devices.h:166
@ XUSP_DEVICE_HTG_940_9
Definition: XUSP_Devices.h:151
@ XUSP_DEVICE_TE0807_03_7DE21
Definition: XUSP_Devices.h:130
@ XUSP_DEVICE_CHAMP_XD1S
Definition: XUSP_Devices.h:111
@ XUSP_DEVICE_ZCU1275
Definition: XUSP_Devices.h:174
@ XUSP_DEVICE_HTG_ZRF_HH_28
Definition: XUSP_Devices.h:163
@ XUSP_DEVICE_ULTRA96
Definition: XUSP_Devices.h:143
#define XCU55C_NAME
#define XCZU4_NAME
Definition: XUSP_Devices.h:918
#define XCU25_NAME
#define XCZU25DR_NAME
#define XCZU67DR_NAME
#define XCZU11_NAME
Definition: XUSP_Devices.h:994
#define XCVU13P_NAME
Definition: XUSP_Devices.h:536
#define XCVU45P_NAME
Definition: XUSP_Devices.h:794
#define XCVU11P_NAME
Definition: XUSP_Devices.h:505
#define XCUX35_NAME
#define XCZU5_NAME
Definition: XUSP_Devices.h:931
#define XCVU7P_NAME
Definition: XUSP_Devices.h:445
#define XCU250_NAME
#define XCZU65DR_NAME
#define XCAU20P_NAME
Definition: XUSP_Devices.h:257
#define XCZU21DR_NAME
#define XCZU6_NAME
Definition: XUSP_Devices.h:945
#define XCKU9P_NAME
Definition: XUSP_Devices.h:312
#define XCZU3_NAME
Definition: XUSP_Devices.h:905
#define XCVU5P_NAME
Definition: XUSP_Devices.h:419
#define XCZU46DR_NAME
#define XCKU11P_NAME
Definition: XUSP_Devices.h:328
#define XCZU2_NAME
Definition: XUSP_Devices.h:893
#define XCZU7_NAME
Definition: XUSP_Devices.h:961
#define XCVU37P_NAME
Definition: XUSP_Devices.h:763
#define XCU26_NAME
#define XCU50_NAME
#define XCU30_NAME
#define XCZU47DR_NAME
#define XCZU43DR_NAME
#define XCU280_NAME
#define XCZU9_NAME
Definition: XUSP_Devices.h:977
#define XCVU31P_NAME
Definition: XUSP_Devices.h:711
#define XCU200_NAME
#define XCVU9P_NAME
Definition: XUSP_Devices.h:471
#define XCZU19_NAME
#define XCZU17_NAME
#define XCVU23P_NAME
Definition: XUSP_Devices.h:615
#define XCVU29P_NAME
Definition: XUSP_Devices.h:674
#define XCVU27P_NAME
Definition: XUSP_Devices.h:637
#define XCVU33P_NAME
Definition: XUSP_Devices.h:725
#define XCKU5P_NAME
Definition: XUSP_Devices.h:299
#define XCZU39DR_NAME
#define XCK26_NAME
#define XCZU49DR_NAME
#define XCVU35P_NAME
Definition: XUSP_Devices.h:739
#define XCVU57P_NAME
Definition: XUSP_Devices.h:849
#define XCZU29DR_NAME
std::string stringToLower(std::string str)
Replaces all uppercase characters in str with lowercase and returns the resulting string.
Definition: str.h:59
std::string removeSpaces(std::string str)
Removes all space chars of str returns the resulting string.
Definition: str.h:47

References str::removeSpaces(), str::iff::stringContains(), str::stringToLower(), XCAU10P_NAME, XCAU15P_NAME, XCAU20P_NAME, XCAU25P_NAME, XCK26_NAME, XCKU11P_NAME, XCKU13P_NAME, XCKU15P_NAME, XCKU19P_NAME, XCKU3P_NAME, XCKU5P_NAME, XCKU9P_NAME, XCU200_NAME, XCU250_NAME, XCU25_NAME, XCU26_NAME, XCU280_NAME, XCU30_NAME, XCU50_NAME, XCU55C_NAME, XCU55N_NAME, XCUX35_NAME, XCVU11P_NAME, XCVU13P_NAME, XCVU19P_NAME, XCVU23P_NAME, XCVU27P_NAME, XCVU29P_NAME, XCVU31P_NAME, XCVU33P_NAME, XCVU35P_NAME, XCVU37P_NAME, XCVU3P_NAME, XCVU45P_NAME, XCVU47P_NAME, XCVU57P_NAME, XCVU5P_NAME, XCVU7P_NAME, XCVU9P_NAME, XCZU11_NAME, XCZU15_NAME, XCZU17_NAME, XCZU19_NAME, XCZU1_NAME, XCZU21DR_NAME, XCZU25DR_NAME, XCZU27DR_NAME, XCZU28DR_NAME, XCZU29DR_NAME, XCZU2_NAME, XCZU39DR_NAME, XCZU3_NAME, XCZU42DR_NAME, XCZU43DR_NAME, XCZU46DR_NAME, XCZU47DR_NAME, XCZU48DR_NAME, XCZU49DR_NAME, XCZU4_NAME, XCZU5_NAME, XCZU65DR_NAME, XCZU67DR_NAME, XCZU6_NAME, XCZU7_NAME, XCZU9_NAME, XUSP_DEVICE_AMC574, XUSP_DEVICE_AMC584, XUSP_DEVICE_AXU15EG, XUSP_DEVICE_AXU2CG, XUSP_DEVICE_AXU3EG, XUSP_DEVICE_AXU4EV, XUSP_DEVICE_AXU5EV, XUSP_DEVICE_AXU9EG, XUSP_DEVICE_CHAMP_XD1S, XUSP_DEVICE_CZU3EG, XUSP_DEVICE_CZU4EV, XUSP_DEVICE_GENESYS_3EG, XUSP_DEVICE_GENESYS_5EV, XUSP_DEVICE_HTG_9200_13P, XUSP_DEVICE_HTG_9200_5P, XUSP_DEVICE_HTG_9200_9P, XUSP_DEVICE_HTG_930_13, XUSP_DEVICE_HTG_930_13_3, XUSP_DEVICE_HTG_930_9, XUSP_DEVICE_HTG_930_9_3, XUSP_DEVICE_HTG_937_37P, XUSP_DEVICE_HTG_937_47P, XUSP_DEVICE_HTG_940_13, XUSP_DEVICE_HTG_940_13_3, XUSP_DEVICE_HTG_940_9, XUSP_DEVICE_HTG_940_9_3, XUSP_DEVICE_HTG_960, XUSP_DEVICE_HTG_VUP_PCIE_HH_13P, XUSP_DEVICE_HTG_VUP_PCIE_HH_9P, XUSP_DEVICE_HTG_Z922_11, XUSP_DEVICE_HTG_Z922_19, XUSP_DEVICE_HTG_Z922_19_DG, XUSP_DEVICE_HTG_Z999_06, XUSP_DEVICE_HTG_Z999_09, XUSP_DEVICE_HTG_Z999_15, XUSP_DEVICE_HTG_ZRF16_29, XUSP_DEVICE_HTG_ZRF16_49, XUSP_DEVICE_HTG_ZRF8_R2_28, XUSP_DEVICE_HTG_ZRF8_R2_48, XUSP_DEVICE_HTG_ZRF8_R2_48_I, XUSP_DEVICE_HTG_ZRF_FMC_28, XUSP_DEVICE_HTG_ZRF_FMC_48, XUSP_DEVICE_HTG_ZRF_HH_28, XUSP_DEVICE_HTG_ZRF_HH_48, XUSP_DEVICE_HTG_ZUSP_PCIE_11_3, XUSP_DEVICE_HTG_ZUSP_PCIE_19_2, XUSP_DEVICE_K26C, XUSP_DEVICE_K26I, XUSP_DEVICE_KCU116, XUSP_DEVICE_KV260, XUSP_DEVICE_NULL, XUSP_DEVICE_PYNQ_ZU, XUSP_DEVICE_TE0802, XUSP_DEVICE_TE0803_04_3BE11, XUSP_DEVICE_TE0807_03_7DE21, XUSP_DEVICE_TE0808_05_9BE21, XUSP_DEVICE_TE0808_05_9GI21, XUSP_DEVICE_TE0808_05_BBE21, XUSP_DEVICE_TE0812, XUSP_DEVICE_TEB0911, XUSP_DEVICE_TEB0912, XUSP_DEVICE_TYSOM_3_ZU7EV, XUSP_DEVICE_ULTRA96, XUSP_DEVICE_ULTRAZED_EV, XUSP_DEVICE_VCU118, XUSP_DEVICE_VCU128, XUSP_DEVICE_VCU129, XUSP_DEVICE_VCU1525, XUSP_DEVICE_VERMEO_T1_MP, XUSP_DEVICE_VERMEO_T1_RF, XUSP_DEVICE_XCAU10P, XUSP_DEVICE_XCAU15P, XUSP_DEVICE_XCAU20P, XUSP_DEVICE_XCAU25P, XUSP_DEVICE_XCK26, XUSP_DEVICE_XCKU11P, XUSP_DEVICE_XCKU13P, XUSP_DEVICE_XCKU15P, XUSP_DEVICE_XCKU19P, XUSP_DEVICE_XCKU3P, XUSP_DEVICE_XCKU5P, XUSP_DEVICE_XCKU9P, XUSP_DEVICE_XCU200, XUSP_DEVICE_XCU25, XUSP_DEVICE_XCU250, XUSP_DEVICE_XCU26, XUSP_DEVICE_XCU280, XUSP_DEVICE_XCU30, XUSP_DEVICE_XCU50, XUSP_DEVICE_XCU55C, XUSP_DEVICE_XCU55N, XUSP_DEVICE_XCUX35, XUSP_DEVICE_XCVU11P, XUSP_DEVICE_XCVU13P, XUSP_DEVICE_XCVU19P, XUSP_DEVICE_XCVU23P, XUSP_DEVICE_XCVU27P, XUSP_DEVICE_XCVU29P, XUSP_DEVICE_XCVU31P, XUSP_DEVICE_XCVU33P, XUSP_DEVICE_XCVU35P, XUSP_DEVICE_XCVU37P, XUSP_DEVICE_XCVU3P, XUSP_DEVICE_XCVU45P, XUSP_DEVICE_XCVU47P, XUSP_DEVICE_XCVU57P, XUSP_DEVICE_XCVU5P, XUSP_DEVICE_XCVU7P, XUSP_DEVICE_XCVU9P, XUSP_DEVICE_XCZU1, XUSP_DEVICE_XCZU11, XUSP_DEVICE_XCZU15, XUSP_DEVICE_XCZU17, XUSP_DEVICE_XCZU19, XUSP_DEVICE_XCZU2, XUSP_DEVICE_XCZU21DR, XUSP_DEVICE_XCZU25DR, XUSP_DEVICE_XCZU27DR, XUSP_DEVICE_XCZU28DR, XUSP_DEVICE_XCZU29DR, XUSP_DEVICE_XCZU3, XUSP_DEVICE_XCZU39DR, XUSP_DEVICE_XCZU4, XUSP_DEVICE_XCZU42DR, XUSP_DEVICE_XCZU43DR, XUSP_DEVICE_XCZU46DR, XUSP_DEVICE_XCZU47DR, XUSP_DEVICE_XCZU48DR, XUSP_DEVICE_XCZU49DR, XUSP_DEVICE_XCZU5, XUSP_DEVICE_XCZU6, XUSP_DEVICE_XCZU65DR, XUSP_DEVICE_XCZU67DR, XUSP_DEVICE_XCZU7, XUSP_DEVICE_XCZU9, XUSP_DEVICE_XPEDITE2600, XUSP_DEVICE_ZCU102, XUSP_DEVICE_ZCU104, XUSP_DEVICE_ZCU106, XUSP_DEVICE_ZCU111, XUSP_DEVICE_ZCU1275, XUSP_DEVICE_ZCU1285, XUSP_DEVICE_ZCU208, XUSP_DEVICE_ZCU216, XUSP_DEVICE_ZCU670, XUSP_DEVICE_ZU_3EG, XUSP_DEVICE_ZU_5EV, and XUSP_DEVICE_ZUBOARD_1CG.

Here is the call graph for this function:

◆ getDeviceByNameOrThrow()

int XilinxUltraScalePlus::getDeviceByNameOrThrow ( std::string  )
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 36 of file XUSP_Devices.cpp.

37 {
38  int deviceID = getDeviceByName(name);
39  if(deviceID == XUSP_DEVICE_NULL)
40  throw runtime_error(string("Unknown device: ").append(name).append(". Maybe the device is not Xilinx US+ device?"));
41  return deviceID;
42 }
int getDeviceByName(std::string) override

References XUSP_DEVICE_NULL.

◆ getFrameType()

string XilinxUltraScalePlus::getFrameType ( int  blockType,
int  rowAddress,
int  columnAddress 
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 118 of file XilinxUltraScalePlus.cpp.

118  {
119  if(XUSP_BLOCKTYPE_BLOCKRAM == blockType)
120  return "BlockRAM Contents";
121  else if(XUSP_BLOCKTYPE_LOGIC == blockType)
122  return LUT_typeOfFrameForResourceLetter[(uint8_t)resourceString[rowAddress][columnAddress]];
123  else
124  return "Unknown";
125 }
#define XUSP_BLOCKTYPE_BLOCKRAM
Definition: XUSP_Fabric.h:34
#define XUSP_BLOCKTYPE_LOGIC
Definition: XUSP_Fabric.h:33

References XUSP_BLOCKTYPE_BLOCKRAM, and XUSP_BLOCKTYPE_LOGIC.

◆ initFabric()

void XilinxUltraScalePlus::initFabric ( )

Definition at line 22 of file XUSP_Fabric.cpp.

22  {
23  setFabricChar(char(0), 0, "EndedLine", true);
24  setFabricChar(char(1), XUSP_EXTRA_FRAMES_PER_ROW, "EndOfLine", true);
25  //The Xilinx US+ fabric in byteman is encoded in the following letters:
26 
27  //A-C are brams
28  setFabricChar('A', 6, "BRAM/RCLK_BRAM_INTF_L"); //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_BRAM_INTF_L"
29  setFabricChar('B', 6, "BRAM/RCLK_BRAM_INTF_TD_L"); //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_BRAM_INTF_TD_L"
30  setFabricChar('C', 6, "BRAM/RCLK_BRAM_INTF_TD_R"); //"BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL + BRAM + NULL + NULL + NULL + NULL/RCLK_BRAM_INTF_TD_R"
31 
32  //D is URAM
33  setFabricChar('D', 9, "URAM"); //"URAM_URAM_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + URAM_URAM_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + URAM_URAM_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + URAM_URAM_DELAY_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_RCLK_URAM_INTF_L_FT"
34 
35  //E-I are DSPs with diff clock resources
36  setFabricChar('E', 8, "DSP/RCLK_DSP_INTF_L"); //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_DSP_INTF_L"
37  setFabricChar('F', 8, "DSP/RCLK_DSP_INTF_CLKBUF_L"); //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_DSP_INTF_CLKBUF_L"
38  setFabricChar('G', 8, "DSP/RCLK_DSP_INTF_R"); //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_DSP_INTF_R"
39  setFabricChar('H', 8, "DSP/RCLK_RCLK_DSP_INTF_DC12_L_FT"); //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_RCLK_DSP_INTF_DC12_L_FT"
40  setFabricChar('I', 8, "DSP/RCLK_RCLK_DSP_INTF_DC12_R_FT"); //"DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/RCLK_RCLK_DSP_INTF_DC12_R_FT"
41 
42  //J-K are switchmatrixes with diff clock resources
43  setFabricChar('J', 76, "INT/RCLK_INT_L"); //"INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT/RCLK_INT_L"
44  setFabricChar('K', 76, "INT/RCLK_INT_R"); //"INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT + INT/RCLK_INT_R"
45 
46  //L-N are CLEM with diff clock resources
47  setFabricChar('L', 16, "CLEM/RCLK_CLEM_L"); //"CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM/RCLK_CLEM_L";
48  setFabricChar('M', 16, "CLEM/RCLK_CLEM_CLKBUF_L"); //"CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM/RCLK_CLEM_CLKBUF_L";
49  setFabricChar('N', 16, "CLEM/RCLK_CLEM_DMC_L"); //"CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM + CLEM/RCLK_CLEM_DMC_L";
50 
51  //O is CLEM_R
52  setFabricChar('O', 16, "CLEM_R"); //"CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R + CLEM_R/RCLK_CLEM_R"
53 
54  //P-R are CLEL_R with diff clock resources
55  setFabricChar('P', 16, "CLEL_R/RCLK_CLEL_R_L"); //"CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R/RCLK_CLEL_R_L";
56  setFabricChar('Q', 16, "CLEL_R/RCLK_CLEL_R_R"); //"CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R/RCLK_CLEL_R_R";
57  setFabricChar('R', 16, "CLEL_R/RCLK_CLEL_R_DCG10_R"); //"CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R + CLEL_R/RCLK_CLEL_R_DCG10_R"
58 
59  //S-T are CLEL_L with diff clock resources
60  setFabricChar('S', 16, "CLEL_L/RCLK_CLEL_L_L"); //"CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L/RCLK_CLEL_L_L"
61  setFabricChar('T', 16, "CLEL_L/RCLK_CLEL_L_R"); //"CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L + CLEL_L/RCLK_CLEL_L_R"
62 
63  //X-Z are lagunas with diff clock resources
64  setFabricChar('X', 16, "LAG_LAG/RCLK_LAG_L"); //"LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG/RCLK_LAG_L"
65  setFabricChar('Y', 16, "LAG_LAG/RCLK_LAG_R"); //"LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG/RCLK_LAG_R"
66  setFabricChar('Z', 16, "LAG_LAG/RCLK_LAG_DMC_L"); //"LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG + LAG_LAG/RCLK_LAG_DMC_L"
67 
68  //a-d, f-z, U-W, "_!@#$%^&*- +=:;()[]{}<" are I/O and misc
69  setFabricChar('a', 8, "HPIO_L"); //"HPIO_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + HPIO_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_HPIO_L"
70  setFabricChar('b', 4, "XIPHY_BYTE_L"); //"XIPHY_BYTE_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + XIPHY_BYTE_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + XIPHY_BYTE_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + XIPHY_BYTE_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_RCLK_XIPHY_INNER_FT"
71  setFabricChar('c', 12, "CMT_L"); //"CMT_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
72  setFabricChar('d', 4, "INT_INTF_LEFT_TERM_IO_FT"); //"INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT + INT_INTF_LEFT_TERM_IO_FT/RCLK_RCLK_INTF_LEFT_TERM_IO_FT"
73  setFabricChar('f', 4, "INT_INTF_R_PCIE4"); //"INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4 + INT_INTF_R_PCIE4/RCLK_INTF_R_IBRK_L"
74  setFabricChar('g', 10, "HDIO_BOT_RIGHT"); //"HDIO_BOT_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + HDIO_TOP_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_HDIO"
75  setFabricChar('h', 4, "INT_INTF_L_PCIE4/RCLK_INTF_L_IBRK_PCIE4_L"); //"INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4/RCLK_INTF_L_IBRK_PCIE4_L"
76  setFabricChar('i', 10, "PCIE4C_PCIE4C_FT"); //"PCIE4C_PCIE4C_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
77  setFabricChar('j', 4, "INT_INTF_L_PCIE4/RCLK_INTF_L_IBRK_PCIE4_R"); //"INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4/RCLK_INTF_L_IBRK_PCIE4_R"
78  setFabricChar('k', 4, "INT_INTF_R_TERM_GT/RCLK_INTF_R_TERM_GT"); //"INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT/RCLK_INTF_R_TERM_GT"
79  setFabricChar('l', 8, "GTH_QUAD_RIGHT"); //"GTH_QUAD_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
80  setFabricChar('m', 10, "CFG_CONFIG"); //"CFG_CONFIG + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
81  setFabricChar('n', 10, "CFGIO_IOB20"); //"CFGIO_IOB20 + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + AMS + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_AMS_CFGIO"
82  setFabricChar('o', 10, "PCIE4_PCIE4_FT"); //"PCIE4_PCIE4_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
83  setFabricChar('p', 8, "GTY_R"); //"GTY_R + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
84  setFabricChar('q', 10, "CMAC"); //"CMAC + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
85  setFabricChar('r', 16, "INT_INTF_LEFT_TERM_PSS/RCLK_INTF_LEFT_TERM_DA7"); //"INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS/RCLK_INTF_LEFT_TERM_DA7"
86  setFabricChar('t', 4, "INT_INTF_RIGHT_TERM_IO"); //"INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO + INT_INTF_RIGHT_TERM_IO/RCLK_INTF_RIGHT_TERM_IO"
87  setFabricChar('u', 12, "CMT_RIGHT"); //"CMT_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
88  setFabricChar('v', 4, "XIPHY_BYTE_RIGHT"); //"XIPHY_BYTE_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + XIPHY_BYTE_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + XIPHY_BYTE_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + XIPHY_BYTE_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_XIPHY_OUTER_RIGHT"
89  setFabricChar('w', 8, "HPIO_RIGHT"); //"HPIO_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + HPIO_RIGHT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/RCLK_HPIO_R"
90  setFabricChar('x', 8, "GTH_QUAD_LEFT"); //"GTH_QUAD_LEFT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
91  setFabricChar('y', 4, "INT_INTF_L_TERM_GT"); //"INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT + INT_INTF_L_TERM_GT/RCLK_INTF_L_TERM_GT"
92  setFabricChar('z', 4, "INT_INTF_R_TERM_GT/RCLK_INTF_RIGHT_TERM_GT_IO"); //"INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT + INT_INTF_R_TERM_GT/RCLK_INTF_RIGHT_TERM_GT_IO"
93 
94  setFabricChar('U', 8, "GTY_L"); //"GTY_L + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
95  setFabricChar('V', 10, "ILKN_ILKN_FT"); //"ILKN_ILKN_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
96  setFabricChar('W', 8, "GTM_DUAL_RIGHT_FT"); //"GTM_DUAL_RIGHT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
97 
98  setFabricChar('_', 8, "GTM_DUAL_LEFT_FT"); //"GTM_DUAL_LEFT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
99  setFabricChar('!', 8, "BLI_BLI_FT"); //"BLI_BLI_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL + DSP + NULL + NULL + NULL + NULL/NULL"
100  setFabricChar('@', 12, "CMT_LEFT_H"); //"CMT_LEFT_H + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
101  setFabricChar('#', 16, "INT_INTF_LEFT_TERM_PSS/RCLK_INTF_LEFT_TERM_ALTO"); //"INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS/RCLK_INTF_LEFT_TERM_ALTO"
102  setFabricChar('$', 16, "INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_DA6_FT"); //"INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_DA6_FT"
103  setFabricChar('%', 16, "INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_DA8_FT"); //"INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_DA8_FT"
104  setFabricChar('^', 4, "INT_INTF_L_CMT"); //"INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_CMT + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_IO + INT_INTF_L_CMT + INT_INTF_L_CMT/RCLK_INTF_L_IBRK_IO_L"
105  setFabricChar('&', 16, "INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_DC12_FT"); //"INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_DC12_FT"
106  setFabricChar('*', 2, "FE_FE_FT"); //"FE_FE_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
107  setFabricChar('-', 4, "INT_INTF_L_PCIE4/RCLK_RCLK_INTF_LEFT_IBRK_FE_L_FT"); //"INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4/RCLK_RCLK_INTF_LEFT_IBRK_FE_L_FT"
108  setFabricChar('+', 8, "HSADC_HSADC_RIGHT_FT"); //"HSADC_HSADC_RIGHT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
109  setFabricChar('=', 8, "HSDAC_HSDAC_RIGHT_FT"); //"HSDAC_HSDAC_RIGHT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
110  setFabricChar(':', 8, "RFADC_RFADC_RIGHT_FT"); //"RFADC_RFADC_RIGHT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
111  setFabricChar(';', 8, "RFDAC_RFDAC_RIGHT_FT"); //"RFDAC_RFDAC_RIGHT_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
112 
113  setFabricChar('.', 16, "INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_MX8_FT"); //"INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS + INT_INTF_LEFT_TERM_PSS/RCLK_RCLK_INTF_LEFT_TERM_MX8_FT"
114  setFabricChar(',', 4, "INT_INTF_L_PCIE4/RCLK_RCLK_INTF_LEFT_IBRK_MX8_L_FT"); //"INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4 + INT_INTF_L_PCIE4/RCLK_RCLK_INTF_LEFT_IBRK_MX8_L_FT"
115 
116  setFabricChar('(', 10, "DFE_DFE_TILEB_FT"); //"DFE_DFE_TILEB_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
117  setFabricChar(')', 2, "DFE_DFE_TILEC_FT"); //"DFE_DFE_TILEC_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
118  setFabricChar('[', 2, "DFE_DFE_TILED_FT"); //"DFE_DFE_TILED_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
119  setFabricChar(']', 10, "DFE_DFE_TILEE_FT"); //"DFE_DFE_TILEE_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
120  setFabricChar('{', 10, "DFE_DFE_TILEG_FT"); //"DFE_DFE_TILEG_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
121  setFabricChar('}', 2, "DFE_DFE_TILEF_FT"); //"DFE_DFE_TILEF_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
122  setFabricChar('<', 10, "DFE_DFE_TILEA_FT"); //"DFE_DFE_TILEA_FT + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL + NULL/NULL"
123 
124  //Also in the fabric exist frames that are mapped in bitstreams, but do not physically exist on the device. We encode these as follows:
125  setFabricChar('0', 4, "EMPTY4", true);
126  setFabricChar('1', 6, "EMPTY6", true); //and 256 empty frames in block type 1
127  setFabricChar('2', 8, "EMPTY8", true);
128  setFabricChar('3', 9, "EMPTY9", true);
129  setFabricChar('4', 10, "EMPTY10", true);
130  setFabricChar('5', 12, "EMPTY12", true);
131  setFabricChar('6', 16, "EMPTY16", true);
132  setFabricChar('7', 76, "EMPTY76", true);
133  setFabricChar('8', 2, "EMPTY2", true);
134 }
void setFabricChar(char character, int frameNumber, std::string tileName, bool isUnused=false)

References setFabricChar(), and XUSP_EXTRA_FRAMES_PER_ROW.

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◆ initializeResourceStringParameters()

void XilinxUltraScalePlus::initializeResourceStringParameters ( )
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 40 of file XilinxUltraScalePlus.cpp.

40  {
42  throw runtime_error("The target device needs to be known, before you can manipulate any bitstream!");
45 
46  for((numberOfCols[0] = 0, numberOfFramesBeforeCol[0][0] = 0, numberOfBRAMCols[0] = 0) ; resourceString[0][numberOfCols[0]] != '\0' ; numberOfCols[0]++){
49  if(str::iff::charIs(resourceString[0][numberOfCols[0]], 'A','B','C','1')) //A-C are BlockRAM columns, '1' is empty blockram column
50  numberOfBRAMCols[0]++;
51  }
52  for(int c = numberOfCols[0] + 1 ; c < XUSP_MAX_COLS ; c++){
54  }
55  for(int c = numberOfCols[0] ; c < XUSP_MAX_COLS ; c++){
57  }
60 
63  for(int r = 1 ; r < numberOfRows ; r++){
65  numberOfCols[r] = numberOfCols[0];
68  for(int c = 0 ; c < XUSP_MAX_COLS ; c++){
70  }
71  for(int c = 0 ; c < XUSP_MAX_COLS ; c++){
73  }
74  }
75  }
76 }
#define XUSP_MAX_COLS
Definition: XUSP_Fabric.h:27
bool charIs(char checkedChar)
Returns false. End of recursion for template.
Definition: iff.h:101

References str::iff::charIs(), XUSP_MAX_COLS, and XUSP_WORDS_PER_FRAME.

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◆ merge()

void XilinxUltraScalePlus::merge ( XilinxUltraScalePlus ,
std::string  ,
Rect2D  ,
Coord2D   
)

Definition at line 24 of file XUSP_Merge.cpp.

24  {
25  log("Merging bitstreams.");
26  //This function uses a pointer to the second XUSP instance, but this pointer should get optimized as it is statically provided in the main function
27  parseParams(params);
28 
30  log("Merging the whole FPGA");
31  src.position = {0, 0};
32  dst = {0, 0};
33  src.size.row = numberOfRows * XUSP_CLB_PER_CLOCK_REGION;
34  src.size.col = maxNumberOfCols;
35  }
36 
37  ensureRegionCompatibility(src, dst);
38 
39  if(src.position.row%XUSP_CLB_PER_CLOCK_REGION != 0)
40  throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUSP_CLB_PER_CLOCK_REGION)).append(")."));
41  if(src.size.row%XUSP_CLB_PER_CLOCK_REGION != 0)
42  throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUSP_CLB_PER_CLOCK_REGION)).append(")."));
43  if(dst.row%XUSP_CLB_PER_CLOCK_REGION != 0)
44  throw runtime_error(string("Currently only full clock region height relocations are supported (use row numbers multiple of ").append(to_string(XUSP_CLB_PER_CLOCK_REGION)).append(")."));
45 
46  Endianness endianDifference = Endian::diff(loadedBitstreamEndianness, srcBitstream->loadedBitstreamEndianness);
47 
48  if((Endianness::NATIVE == endianDifference) && MergeOP::SET == selectedOptions.op)
49  fastMerge(srcBitstream, src, dst);
50  else
51  flexiMerge(srcBitstream, endianDifference, src, dst);
52  log("Merging bitstreams complete.");
53 }
Endianness
< Endianness in byteman is represented not only by big/little endian, but also by potential bit swapp...
Definition: Endianness.h:47
@ NATIVE
System native will always be the fastest endianess to process.
#define XUSP_CLB_PER_CLOCK_REGION
Definition: XUSP_Fabric.h:41
void ensureRegionCompatibility(Rect2D src, Coord2D dst)
Definition: inlineMerge.h:33
void fastMerge(XilinxConfigurationAccessPort *srcBitstream, Rect2D src, Coord2D dst)
Definition: inlineMerge.h:51
void flexiMerge(XilinxConfigurationAccessPort *srcBitstream, Endianness endianConversionNeeded, Rect2D src, Coord2D dst)
Definition: inlineMerge.h:86
Endianness diff(Endianness e1, Endianness e2)
Definition: Endianness.h:117

References Coord2D::col, Endian::diff(), ensureRegionCompatibility(), fastMerge(), flexiMerge(), XilinxConfigurationAccessPort< MAX_SLRS, MAX_ROWS, MAX_COLS, MAX_BRAM_COLS, BLOCKTYPE_MAX, BLOCKTYPE_LOGIC, BLOCKTYPE_BLOCKRAM, WORDS_BEFORE_CLK, WORDS_AT_CLK, WORDS_AFTER_CLK, WORDS_PER_FRAME, FRAMES_PER_BRAM_CONTENT_COLUMN, CLB_PER_CLOCK_REGION, BRAM_PER_CLOCK_REGION, EXTRA_FRAMES_PER_ROW, FAR_ENABLE_TOP_BOTTOM_BIT, FAR_TOP_BOTTOM_BIT_SHIFT, FAR_BLOCKTYPE_SHIFT, FAR_BLOCKTYPE_MASK, FAR_ROWADDRESS_SHIFT, FAR_ROWADDRESS_MASK, FAR_COLUMNADDRESS_SHIFT, FAR_COLUMNADDRESS_MASK, FAR_MINORADDRESS_SHIFT, FAR_MINORADDRESS_MASK >::loadedBitstreamEndianness, NATIVE, parseParams(), Rect2D::position, Coord2D::row, Rect2D::size, Endian::to_string(), and XUSP_CLB_PER_CLOCK_REGION.

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◆ outputBitstreamEmptySLRHeaderSequence()

void XilinxUltraScalePlus::outputBitstreamEmptySLRHeaderSequence ( std::ofstream &  ,
int  ,
bool  ,
Endianness   
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 101 of file XUSP_Output.cpp.

102 {
103  XCAP_writeNOP(fout, 132, 0, e);
104  //Optional Shutdown + 1 NOP ?
106  XCAP_writeNOP(fout, 2, 0, e);
109 
110  if((slr + 1) < numberOfSLRs) { // If there are more SLRs, output the magic
112  slrMagicInstrLocation[slr] = fout.tellp();
113  XCAP_writeType2(fout, 0, e);
114  }
115 }
std::streamoff slrMagicInstrLocation[4]

References XCAP::IDCODE, XCAP::MAGIC1, XCAP::NULLCMD, XCAP::RCRC, XCAP_writeCommand(), XCAP_writeNOP(), XCAP_writeRegister(), XCAP_writeSelectRegister(), and XCAP_writeType2().

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◆ outputBitstreamEmptySLRWrapUpSequence()

void XilinxUltraScalePlus::outputBitstreamEmptySLRWrapUpSequence ( std::ofstream &  ,
int  ,
bool  ,
Endianness   
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 116 of file XUSP_Output.cpp.

117 {
118  streamoff currentStreamHead = fout.tellp();
119  streamoff bypassSize = (currentStreamHead - slrMagicInstrLocation[slr])/4 - 1;
120  fout.seekp(slrMagicInstrLocation[slr]);
121  FileIO::write32(fout, static_cast<uint32_t>(bypassSize), e);
122  fout.seekp(currentStreamHead);
128 }

References XCAP::DESYNC, XCAP::START, FileIO::write32(), XCAP_writeCommand(), and XCAP_writeNOP().

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◆ outputBitstreamGlobalFooterSequence()

void XilinxUltraScalePlus::outputBitstreamGlobalFooterSequence ( std::ofstream &  ,
bool  ,
Endianness   
)
overridevirtual

◆ outputBitstreamGlobalHeaderSequence()

void XilinxUltraScalePlus::outputBitstreamGlobalHeaderSequence ( std::ofstream &  ,
bool  ,
Endianness   
)
overridevirtual

◆ outputBitstreamSLRFooterBitstreamSequence()

void XilinxUltraScalePlus::outputBitstreamSLRFooterBitstreamSequence ( std::ofstream &  ,
int  ,
bool  ,
Endianness   
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 49 of file XUSP_Output.cpp.

50 {
51  if(fullBitstream) // Add GRESTORE since it is full device bitstream.
52  {
54  XCAP_writeNOP(fout, 1, 0, e);
55  }
56 
57  XCAP_writeNOP(fout, 1, 0, e);
58  uint32_t ctrl0 = XCAP_getCTRL0value(0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0);
59  XCAP_writeMaskAndRegister(fout, XCAP::Register::CTRL0, ctrl0, ctrl0, e);
60 
62  XCAP_writeNOP(fout, 20, 0, e);
63 
65  XCAP_writeNOP(fout, 1, 0, e);
66 
68  XCAP_writeNOP(fout, 1, 0, e);
70  XCAP_writeNOP(fout, 1, 0, e);
72  XCAP_writeNOP(fout, 16, 0, e);
73 }
void XCAP_writeMaskAndRegister(std::ofstream &fout, XCAP::Register reg, int writeMask, int writeValue, Endianness e)
Generate the encoding for writing a CAP register with a mask and write it to file ofstream.
Definition: inlineCAP.h:396
uint32_t XCAP_getCTRL0value(int EFUSE_KEY, int ICAP_SELECT, int Reserved_29_13, int OverTempShutDown, int Reserved_11, int ConfigFallback, int Reserved_9, int GLUTMASK_B, int Reserved_7, int DEC, int SBITS, int PERSIST, int Reserved_2_1, int GTS_USR_B)
Generate CTRL0 register write value.
Definition: inlineCAP.h:513
uint32_t XCAP_getFarFarInstruction()
Generate and return the encoding for a Far FAR instruction.
Definition: inlineFAR.h:194

References XCAP::CTRL0, XCAP::DESYNC, XCAP::DGHIGH, XCAP::FAR, XCAP::GRESTORE, XCAP::RCRC, XCAP::START, XCAP_getCTRL0value(), XCAP_getFarFarInstruction(), XCAP_writeCommand(), XCAP_writeMaskAndRegister(), XCAP_writeNOP(), and XCAP_writeRegister().

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◆ outputBitstreamSLRHeaderAfterBitstreamSequence()

void XilinxUltraScalePlus::outputBitstreamSLRHeaderAfterBitstreamSequence ( std::ofstream &  ,
int  ,
bool  ,
Endianness   
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 74 of file XUSP_Output.cpp.

75 {
76  if((slr + 1) < numberOfSLRs) { // If there are more SLRs, output the magic
77  XCAP_writeNOP(fout, 400, 0, e);
78  XCAP_writeSYNQ(fout, e);
79  XCAP_writeNOP(fout, 1, 0, e);
81  XCAP_writeNOP(fout, 2, 0, e);
82 
84  slrMagicInstrLocation[slr] = fout.tellp();
85  XCAP_writeType2(fout, 0, e);
86  }
87 }

References XCAP::MAGIC1, XCAP::RCRC, XCAP_writeCommand(), XCAP_writeNOP(), XCAP_writeSelectRegister(), XCAP_writeSYNQ(), and XCAP_writeType2().

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◆ outputBitstreamSLRHeaderBitstreamSequence()

void XilinxUltraScalePlus::outputBitstreamSLRHeaderBitstreamSequence ( std::ofstream &  ,
int  ,
bool  ,
Endianness   
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 37 of file XUSP_Output.cpp.

38 {
39  XCAP_writeNOP(fout, 132, 0, e);
40  //Optional Shutdown + 1 NOP ?
42  XCAP_writeNOP(fout, 2, 0, e);
45  uint32_t ctrl0 = XCAP_getCTRL0value(0, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0); //disable fallback bitstream, enable overwriting of LUTs
46  XCAP_writeMaskAndRegister(fout, XCAP::Register::CTRL0, ctrl0, ctrl0, e);
48 }

References XCAP::CTRL0, XCAP::CTRL1, XCAP::IDCODE, XCAP::NULLCMD, XCAP::RCRC, XCAP_getCTRL0value(), XCAP_writeCommand(), XCAP_writeMaskAndRegister(), XCAP_writeNOP(), and XCAP_writeRegister().

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◆ outputBitstreamSLRWrapUpSequence()

void XilinxUltraScalePlus::outputBitstreamSLRWrapUpSequence ( std::ofstream &  ,
int  ,
bool  ,
Endianness   
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 88 of file XUSP_Output.cpp.

89 {
90  streamoff currentStreamHead = fout.tellp();
91  streamoff bypassSize = (currentStreamHead - slrMagicInstrLocation[slr])/4 - 1;
92  fout.seekp(slrMagicInstrLocation[slr]);
93  FileIO::write32(fout, static_cast<uint32_t>(bypassSize), e);
94  fout.seekp(currentStreamHead);
100 }

References XCAP::DESYNC, XCAP::START, FileIO::write32(), XCAP_writeCommand(), and XCAP_writeNOP().

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◆ readBitstream()

void XilinxUltraScalePlus::readBitstream ( std::string  )

Definition at line 29 of file XUSP_Input.cpp.

30 {
31  ifstream fin (filename, ifstream::binary);
32  if(!fin.good())
33  throw runtime_error(string("Could not open file: \"").append(filename).append("\" .\n"));
34  log("Reading Xilinx UltraScale+ bitstream from file \"" + filename + "\"");
35 
36  if(str::iff::stringEndsWith(filename, ".bit"))
37  readBitstreamBIT(fin);
38  else if(str::iff::stringEndsWith(filename, ".bin"))
39  readBitstreamBIN(fin);
40  else
41  throw runtime_error(string("Unknown Xilinx UltraScale+ file format tried to be read.\n"));
42  fin.close();
43  log("Xilinx UltraScale+ bitstream file \"" + filename + "\" read successfully.");
44 }
void readBitstreamBIN(std::ifstream &fin)
Definition: inlineInput.h:346
void readBitstreamBIT(std::ifstream &fin)
Definition: inlineInput.h:334

References readBitstreamBIN(), readBitstreamBIT(), and str::iff::stringEndsWith().

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◆ setDevice()

void XilinxUltraScalePlus::setDevice ( int  ,
std::string  = "" 
)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 545 of file XUSP_Devices.cpp.

546 {
548  bool customNameSet = false;
549  #define setCustomPartName(x) {customNameSet = true; partName = x;}
550  switch(deviceID){
551  //XUSP Artix
552  #ifdef XUSPARTIX
553  case XUSP_DEVICE_XCAU10P:
554  XCAU10P();
555  break;
556  case XUSP_DEVICE_XCAU15P:
557  XCAU15P();
558  break;
559  case XUSP_DEVICE_XCAU20P:
560  XCAU20P();
561  break;
562  case XUSP_DEVICE_XCAU25P:
563  XCAU25P();
564  break;
565  #endif
566 
567  //XUSP Kintex
568  #ifdef XUSPKINTEX
569  case XUSP_DEVICE_XCKU3P:
570  XCKU3P();
571  break;
572  case XUSP_DEVICE_XCKU5P:
573  XCKU5P();
574  break;
575  case XUSP_DEVICE_XCKU9P:
576  XCKU9P();
577  break;
578  case XUSP_DEVICE_XCKU11P:
579  XCKU11P();
580  break;
581  case XUSP_DEVICE_XCKU13P:
582  XCKU13P();
583  break;
584  case XUSP_DEVICE_XCKU15P:
585  XCKU15P();
586  break;
587  case XUSP_DEVICE_XCKU19P:
588  XCKU19P();
589  break;
590  #endif
591 
592  //XUSP Virtex
593  #ifdef XUSPVIRTEX
594  case XUSP_DEVICE_XCVU3P:
595  XCVU3P();
596  break;
597  case XUSP_DEVICE_XCVU5P:
598  XCVU5P();
599  break;
600  case XUSP_DEVICE_XCVU7P:
601  XCVU7P();
602  break;
603  case XUSP_DEVICE_XCVU9P:
604  XCVU9P();
605  break;
606  case XUSP_DEVICE_XCVU11P:
607  XCVU11P();
608  break;
609  case XUSP_DEVICE_XCVU13P:
610  XCVU13P();
611  break;
612  case XUSP_DEVICE_XCVU19P:
613  XCVU19P();
614  break;
615  case XUSP_DEVICE_XCVU23P:
616  XCVU23P();
617  break;
618  case XUSP_DEVICE_XCVU27P:
619  XCVU27P();
620  break;
621  case XUSP_DEVICE_XCVU29P:
622  XCVU29P();
623  break;
624  case XUSP_DEVICE_XCVU31P:
625  XCVU31P();
626  break;
627  case XUSP_DEVICE_XCVU33P:
628  XCVU33P();
629  break;
630  case XUSP_DEVICE_XCVU35P:
631  XCVU35P();
632  break;
633  case XUSP_DEVICE_XCVU37P:
634  XCVU37P();
635  break;
636  case XUSP_DEVICE_XCVU45P:
637  XCVU45P();
638  break;
639  case XUSP_DEVICE_XCVU47P:
640  XCVU47P();
641  break;
642  case XUSP_DEVICE_XCVU57P:
643  XCVU57P();
644  break;
645  #endif
646 
647  //XUSP RFSoC
648  #ifdef XUSPZYNQRF
650  XCZU21DR();
651  break;
653  XCZU25DR();
654  break;
656  XCZU27DR();
657  break;
659  XCZU28DR();
660  break;
662  XCZU29DR();
663  break;
665  XCZU39DR();
666  break;
668  XCZU42DR();
669  break;
671  XCZU43DR();
672  break;
674  XCZU46DR();
675  break;
677  XCZU47DR();
678  break;
680  XCZU48DR();
681  break;
683  XCZU49DR();
684  break;
686  XCZU65DR();
687  break;
689  XCZU67DR();
690  break;
691  #endif
692 
693  //XUSP MPSoC
694  #ifdef XUSPZYNQMP
695  case XUSP_DEVICE_XCZU1:
696  XCZU1();
697  break;
698  case XUSP_DEVICE_XCZU2:
699  XCZU2();
700  break;
701  case XUSP_DEVICE_XCZU3:
702  XCZU3();
703  break;
704  case XUSP_DEVICE_XCZU4:
705  XCZU4();
706  break;
707  case XUSP_DEVICE_XCZU5:
708  XCZU5();
709  break;
710  case XUSP_DEVICE_XCZU6:
711  XCZU6();
712  break;
713  case XUSP_DEVICE_XCZU7:
714  XCZU7();
715  break;
716  case XUSP_DEVICE_XCZU9:
717  XCZU9();
718  break;
719  case XUSP_DEVICE_XCZU11:
720  XCZU11();
721  break;
722  case XUSP_DEVICE_XCZU15:
723  XCZU15();
724  break;
725  case XUSP_DEVICE_XCZU17:
726  XCZU17();
727  break;
728  case XUSP_DEVICE_XCZU19:
729  XCZU19();
730  break;
731  #endif
732 
733  //XUSP Alveo
734  #ifdef XUSPALVEO
735  case XUSP_DEVICE_XCU200:
736  XCU200();
737  setCustomPartName("xcu200-fsgd2104-2-e");
738  break;
739  case XUSP_DEVICE_XCU250:
740  XCU250();
741  setCustomPartName("xcu250-figd2104-2l-e");
742  break;
743  case XUSP_DEVICE_XCU26:
744  XCU26();
745  setCustomPartName("xcu26-l2vsva1365e");
746  break;
747  case XUSP_DEVICE_XCUX35:
748  XCUX35();
749  break;
750  case XUSP_DEVICE_XCU50:
751  XCU50();
752  setCustomPartName("xcu50-fsvh2104-2lv-e");
753  break;
754  case XUSP_DEVICE_XCU55N:
755  XCU55N();
756  break;
757  case XUSP_DEVICE_XCU55C:
758  XCU55C();
759  setCustomPartName("xcu55c-l2fsvh2892e");
760  break;
761  case XUSP_DEVICE_XCU280:
762  XCU280();
763  break;
764  case XUSP_DEVICE_XCU30:
765  XCU30();
766  break;
767  case XUSP_DEVICE_XCU25:
768  XCU25();
769  break;
770  //Kria
771  case XUSP_DEVICE_XCK26:
772  XCK26();
773  break;
774  case XUSP_DEVICE_K26C:
775  XCK26();
776  setCustomPartName("xck26-sfvc784-2lv-c");
777  break;
778  case XUSP_DEVICE_K26I:
779  XCK26();
780  setCustomPartName("xck26-sfvc784-2lv-i");
781  break;
782  case XUSP_DEVICE_KV260:
783  XCK26();
784  setCustomPartName("xck26-sfvc784-2lv-c");
785  break;
786  #endif
787 
788  //XUSP Boards
789  #ifdef XUSPBOARDS
790  case XUSP_DEVICE_PYNQ_ZU:
791  XCZU5();
792  setCustomPartName("xczu5eg-1sfvc784");
793  break;
794  case XUSP_DEVICE_ZCU102:
795  XCZU9();
796  setCustomPartName("xczu9eg-2ffvb1156");
797  break;
798  case XUSP_DEVICE_ZCU104:
799  XCZU7();
800  setCustomPartName("xczu7ev-2ffvc1156");
801  break;
802  case XUSP_DEVICE_ZCU106:
803  XCZU7();
804  setCustomPartName("xczu7ev-2ffvc1156");
805  break;
806  case XUSP_DEVICE_AXU15EG:
807  XCZU15();
808  setCustomPartName("xczu15eg-2sffvb1156i");
809  break;
810  case XUSP_DEVICE_AXU2CG:
811  XCZU2();
812  setCustomPartName("xczu2cg-1sfvc784e");
813  break;
814  case XUSP_DEVICE_AXU3EG:
815  XCZU3();
816  setCustomPartName("xczu3eg-1sfvc784i");
817  break;
818  case XUSP_DEVICE_AXU4EV:
819  XCZU4();
820  setCustomPartName("xczu4ev-1sfvc784i");
821  break;
822  case XUSP_DEVICE_AXU5EV:
823  XCZU5();
824  setCustomPartName("xczu5ev-2sfvc784i");
825  break;
826  case XUSP_DEVICE_AXU9EG:
827  XCZU9();
828  setCustomPartName("xczu9eg-2ffvb1156i");
829  break;
831  XCZU7();
832  setCustomPartName("xczu7ev-fbvb900");
833  break;
835  XCZU4();
836  break;
837  case XUSP_DEVICE_ZU_3EG:
838  XCZU3();
839  setCustomPartName("xczu3eg-sfvc784-1-e");
840  break;
841  case XUSP_DEVICE_ZU_5EV:
842  XCZU5();
843  setCustomPartName("xczu5ev-sfvc784-1-e");
844  break;
846  XCZU6();
847  setCustomPartName("xczu6eg-2ffvb1156e");
848  break;
850  XCZU9();
851  setCustomPartName("xczu9eg-2ffvb1156e");
852  break;
854  XCZU15();
855  setCustomPartName("xczu15eg-2ffvb1156e");
856  break;
858  XCVU9P();
859  setCustomPartName("xcvu9p-3flgb2104e");
860  break;
862  XCVU9P();
863  setCustomPartName("xcvu9p-2flgb2104e");
864  break;
866  XCVU13P();
867  setCustomPartName("xcvu13p-3fhgb2104e");
868  break;
870  XCVU13P();
871  setCustomPartName("xcvu13p-2fhgb2104e");
872  break;
874  XCVU37P();
875  setCustomPartName("xcvu37p-2fsvh2892e4539");
876  break;
878  XCVU47P();
879  setCustomPartName("xcvu47p-2fsvh2892e4539");
880  break;
882  XCZU11();
883  setCustomPartName("xczu11eg-3ffvc1760e");
884  break;
886  XCZU19();
887  setCustomPartName("xqzu19eg-2ffvc1760e");
888  break;
890  XCZU19();
891  setCustomPartName("xczu19eg-2ffvc1760e");
892  break;
893  case XUSP_DEVICE_CZU3EG:
894  XCZU3();
895  setCustomPartName("xczu3eg-1sfvc784e");
896  break;
897  case XUSP_DEVICE_CZU4EV:
898  XCZU4();
899  setCustomPartName("xczu3eg-1sfvc784e");
900  break;
901  case XUSP_DEVICE_TE0802:
902  XCZU2();
903  setCustomPartName("xczu2cg-1sbva484e");
904  break;
906  XCZU3();
907  setCustomPartName("xczu3eg-1sfvc784e");
908  break;
910  XCZU7();
911  setCustomPartName("xczu7ev-1fbvb900e");
912  break;
914  XCZU9();
915  setCustomPartName("xczu9eg-1ffvc900e");
916  break;
918  XCZU9();
919  setCustomPartName("xczu9eg-2ffvc900i");
920  break;
922  XCZU15();
923  setCustomPartName("xczu15eg-1ffvc900e");
924  break;
925  case XUSP_DEVICE_TE0812:
926  XCZU6();
927  setCustomPartName("xczu6eg-1ffvc900i");
928  break;
929  case XUSP_DEVICE_TEB0911:
930  XCZU9();
931  setCustomPartName("xczu9eg-1ffvb1156e");
932  break;
933  case XUSP_DEVICE_TEB0912:
934  XCZU11();
935  setCustomPartName("xczu11eg-1ffvc1760i");
936  break;
938  XCZU7();
939  setCustomPartName("zu7ev-ffvc1156");
940  break;
942  XCZU11();
943  setCustomPartName("xczu11eg");
944  break;
945  case XUSP_DEVICE_AMC574:
946  XCZU29DR();
947  setCustomPartName("xczu29dr");
948  break;
949  case XUSP_DEVICE_ZCU208:
950  XCZU48DR();
951  setCustomPartName("xczu48dr-2fsvg1517e5184");
952  break;
953  case XUSP_DEVICE_ZCU216:
954  XCZU49DR();
955  setCustomPartName("xczu49dr-2ffvf1760");
956  break;
957  case XUSP_DEVICE_ZCU670:
958  XCZU67DR();
959  setCustomPartName("xczu67dr-2fsve1156i");
960  break;
961  case XUSP_DEVICE_ULTRA96:
962  XCZU3();
963  setCustomPartName("xczu3eg-sbva484-1-i");
964  break;
965  case XUSP_DEVICE_AMC584:
966  XCVU13P();
967  break;
968  case XUSP_DEVICE_HTG_960:
969  XCVU19P();
970  setCustomPartName("xcvu19p-2fsvb3824e");
971  break;
972  case XUSP_DEVICE_VCU1525:
973  XCVU9P();
974  setCustomPartName("xcvu9p-l2fsgd2104e");
975  break;
976  case XUSP_DEVICE_VCU118:
977  XCVU9P();
978  setCustomPartName("xcvu9p-lga2104e");
979  break;
980  case XUSP_DEVICE_VCU128:
981  XCVU37P();
982  setCustomPartName("xcvu37p-l2fsvh2892e");
983  break;
984  case XUSP_DEVICE_VCU129:
985  XCVU29P();
986  setCustomPartName("xcvu29p-l2fsga2577e");
987  break;
989  XCVU9P();
990  setCustomPartName("xcvu9p-3flgb2104e");
991  break;
993  XCVU9P();
994  setCustomPartName("xcvu9p-2flgb2104e");
995  break;
997  XCVU13P();
998  setCustomPartName("xcvu13p-3fhgb2104e");
999  break;
1001  XCVU13P();
1002  setCustomPartName("xcvu13p-2fhgb2104e");
1003  break;
1005  XCVU5P();
1006  setCustomPartName("xcvu5p-2flgb2104e");
1007  break;
1009  XCVU9P();
1010  setCustomPartName("xcvu9p-2flgb2104e");
1011  break;
1013  XCVU13P();
1014  setCustomPartName("xcvu13p-2fhgb2104e");
1015  break;
1017  XCVU9P();
1018  setCustomPartName("xcvu9p-2flgb2104e");
1019  break;
1021  XCVU13P();
1022  setCustomPartName("xcvu13p-2fhgb2104e");
1023  break;
1025  XCZU28DR();
1026  setCustomPartName("xczu28dr-2ffvg1517");
1027  break;
1029  XCZU48DR();
1030  setCustomPartName("xczu48dr-2ffvg1517");
1031  break;
1033  XCZU29DR();
1034  setCustomPartName("xczu29dr-2ffvf1760e");
1035  break;
1037  XCZU49DR();
1038  setCustomPartName("xczu49dr-2ffvf1760e");
1039  break;
1041  XCZU28DR();
1042  setCustomPartName("xczu28dr-2ffvg1517");
1043  break;
1045  XCZU48DR();
1046  setCustomPartName("xczu48dr-2ffvg1517");
1047  break;
1049  XCZU11();
1050  setCustomPartName("xczu11eg-3ffvc1760e");
1051  break;
1053  XCZU19();
1054  setCustomPartName("xczu19eg-2ffvc1760e");
1055  break;
1057  XCZU28DR();
1058  setCustomPartName("xczu28dr-2ffvg1517");
1059  break;
1061  XCZU48DR();
1062  setCustomPartName("xczu48dr-ffvg1517-2-i");
1063  break;
1065  XCZU48DR();
1066  setCustomPartName("xczu48dr-2ffvg1517");
1067  break;
1069  XCZU1();
1070 
1071  break;
1072  case XUSP_DEVICE_KCU116:
1073  XCKU5P();
1074  setCustomPartName("xcku5p-ffvb676-2-e");
1075  break;
1077  XCZU19();
1078  setCustomPartName("xczu19eg-ffvd1760-2L-e");
1079  break;
1081  XCZU21DR();
1082  setCustomPartName("xczu21dr-ffvd1156-2L-e");
1083  break;
1084  case XUSP_DEVICE_ZCU1275:
1085  XCZU29DR();
1086  setCustomPartName("xczu29dr-ffvf1760-2-e");
1087  break;
1088  case XUSP_DEVICE_ZCU1285:
1089  XCZU39DR();
1090  setCustomPartName("xczu39dr-ffvf1760-2-i");
1091  break;
1092  case XUSP_DEVICE_ZCU111:
1093  XCZU28DR();
1094  setCustomPartName("xczu28dr-ffvg1517-2-e");
1095  break;
1097  XCZU5();
1098  setCustomPartName("xczu5ev-sfvc784-1-e");
1099  break;
1101  XCZU3();
1102  setCustomPartName("xczu3eg-sfvc784-1-e");
1103  break;
1104  #endif
1105  default:throw runtime_error("Unknown device ID.");
1106  }
1107  #undef setCustomPartName
1108  if(!customNameSet) // if we didn't set already a good full name
1109  if(customPartName != "")// if not empty string
1110  partName = customPartName;
1111 
1112 
1113  log("Initialized device resource string for \"" + initializedResourceStringShortPartName + "\"");
1114 }
#define XCZU65DR()
#define XCK26()
#define XCZU29DR()
#define XCVU29P()
Definition: XUSP_Devices.h:705
#define XCU26()
#define XCVU5P()
Definition: XUSP_Devices.h:438
#define XCZU2()
Definition: XUSP_Devices.h:900
#define XCKU3P()
Definition: XUSP_Devices.h:294
#define XCZU3()
Definition: XUSP_Devices.h:912
#define XCZU42DR()
#define XCKU19P()
Definition: XUSP_Devices.h:398
#define XCVU35P()
Definition: XUSP_Devices.h:756
#define XCU55N()
#define XCVU11P()
Definition: XUSP_Devices.h:529
#define XCVU33P()
Definition: XUSP_Devices.h:733
#define XCU25()
#define XCU55C()
#define XCAU10P()
Definition: XUSP_Devices.h:239
#define XCVU13P()
Definition: XUSP_Devices.h:567
#define XCZU17()
#define XCAU25P()
Definition: XUSP_Devices.h:279
#define XCZU43DR()
#define XCKU13P()
Definition: XUSP_Devices.h:356
#define XCVU47P()
Definition: XUSP_Devices.h:842
#define XCZU19()
#define XCZU21DR()
#define XCVU37P()
Definition: XUSP_Devices.h:787
#define XCU250()
#define XCUX35()
#define XCVU3P()
Definition: XUSP_Devices.h:413
#define XCVU23P()
Definition: XUSP_Devices.h:630
#define XCVU31P()
Definition: XUSP_Devices.h:719
#define XCZU27DR()
#define XCVU9P()
Definition: XUSP_Devices.h:498
#define XCKU15P()
Definition: XUSP_Devices.h:376
#define XCZU7()
Definition: XUSP_Devices.h:971
#define XCZU67DR()
#define XCZU25DR()
#define XCKU11P()
Definition: XUSP_Devices.h:340
#define XCVU19P()
Definition: XUSP_Devices.h:609
#define XCZU15()
#define XCU50()
#define XCZU49DR()
#define XCZU6()
Definition: XUSP_Devices.h:956
#define XCZU9()
Definition: XUSP_Devices.h:988
#define XCAU15P()
Definition: XUSP_Devices.h:251
#define XCAU20P()
Definition: XUSP_Devices.h:265
#define XCVU45P()
Definition: XUSP_Devices.h:811
#define XCU280()
#define XCZU11()
#define XCKU5P()
Definition: XUSP_Devices.h:307
#define XCVU57P()
Definition: XUSP_Devices.h:873
#define XCZU46DR()
#define XCZU47DR()
#define XCVU7P()
Definition: XUSP_Devices.h:464
#define XCZU4()
Definition: XUSP_Devices.h:926
#define XCKU9P()
Definition: XUSP_Devices.h:323
#define XCVU27P()
Definition: XUSP_Devices.h:668
#define XCZU1()
Definition: XUSP_Devices.h:887
#define XCZU28DR()
#define XCU200()
#define XCU30()
#define XCZU48DR()
#define XCZU5()
Definition: XUSP_Devices.h:939
#define XCZU39DR()
void clearResourceStringArrays()
Definition: inlineBlank.h:17

References clearResourceStringArrays(), XCAU10P, XCAU15P, XCAU20P, XCAU25P, XCK26, XCKU11P, XCKU13P, XCKU15P, XCKU19P, XCKU3P, XCKU5P, XCKU9P, XCU200, XCU25, XCU250, XCU26, XCU280, XCU30, XCU50, XCU55C, XCU55N, XCUX35, XCVU11P, XCVU13P, XCVU19P, XCVU23P, XCVU27P, XCVU29P, XCVU31P, XCVU33P, XCVU35P, XCVU37P, XCVU3P, XCVU45P, XCVU47P, XCVU57P, XCVU5P, XCVU7P, XCVU9P, XCZU1, XCZU11, XCZU15, XCZU17, XCZU19, XCZU2, XCZU21DR, XCZU25DR, XCZU27DR, XCZU28DR, XCZU29DR, XCZU3, XCZU39DR, XCZU4, XCZU42DR, XCZU43DR, XCZU46DR, XCZU47DR, XCZU48DR, XCZU49DR, XCZU5, XCZU6, XCZU65DR, XCZU67DR, XCZU7, XCZU9, XUSP_DEVICE_AMC574, XUSP_DEVICE_AMC584, XUSP_DEVICE_AXU15EG, XUSP_DEVICE_AXU2CG, XUSP_DEVICE_AXU3EG, XUSP_DEVICE_AXU4EV, XUSP_DEVICE_AXU5EV, XUSP_DEVICE_AXU9EG, XUSP_DEVICE_CHAMP_XD1S, XUSP_DEVICE_CZU3EG, XUSP_DEVICE_CZU4EV, XUSP_DEVICE_GENESYS_3EG, XUSP_DEVICE_GENESYS_5EV, XUSP_DEVICE_HTG_9200_13P, XUSP_DEVICE_HTG_9200_5P, XUSP_DEVICE_HTG_9200_9P, XUSP_DEVICE_HTG_930_13, XUSP_DEVICE_HTG_930_13_3, XUSP_DEVICE_HTG_930_9, XUSP_DEVICE_HTG_930_9_3, XUSP_DEVICE_HTG_937_37P, XUSP_DEVICE_HTG_937_47P, XUSP_DEVICE_HTG_940_13, XUSP_DEVICE_HTG_940_13_3, XUSP_DEVICE_HTG_940_9, XUSP_DEVICE_HTG_940_9_3, XUSP_DEVICE_HTG_960, XUSP_DEVICE_HTG_VUP_PCIE_HH_13P, XUSP_DEVICE_HTG_VUP_PCIE_HH_9P, XUSP_DEVICE_HTG_Z922_11, XUSP_DEVICE_HTG_Z922_19, XUSP_DEVICE_HTG_Z922_19_DG, XUSP_DEVICE_HTG_Z999_06, XUSP_DEVICE_HTG_Z999_09, XUSP_DEVICE_HTG_Z999_15, XUSP_DEVICE_HTG_ZRF16_29, XUSP_DEVICE_HTG_ZRF16_49, XUSP_DEVICE_HTG_ZRF8_R2_28, XUSP_DEVICE_HTG_ZRF8_R2_48, XUSP_DEVICE_HTG_ZRF8_R2_48_I, XUSP_DEVICE_HTG_ZRF_FMC_28, XUSP_DEVICE_HTG_ZRF_FMC_48, XUSP_DEVICE_HTG_ZRF_HH_28, XUSP_DEVICE_HTG_ZRF_HH_48, XUSP_DEVICE_HTG_ZUSP_PCIE_11_3, XUSP_DEVICE_HTG_ZUSP_PCIE_19_2, XUSP_DEVICE_K26C, XUSP_DEVICE_K26I, XUSP_DEVICE_KCU116, XUSP_DEVICE_KV260, XUSP_DEVICE_PYNQ_ZU, XUSP_DEVICE_TE0802, XUSP_DEVICE_TE0803_04_3BE11, XUSP_DEVICE_TE0807_03_7DE21, XUSP_DEVICE_TE0808_05_9BE21, XUSP_DEVICE_TE0808_05_9GI21, XUSP_DEVICE_TE0808_05_BBE21, XUSP_DEVICE_TE0812, XUSP_DEVICE_TEB0911, XUSP_DEVICE_TEB0912, XUSP_DEVICE_TYSOM_3_ZU7EV, XUSP_DEVICE_ULTRA96, XUSP_DEVICE_ULTRAZED_EV, XUSP_DEVICE_VCU118, XUSP_DEVICE_VCU128, XUSP_DEVICE_VCU129, XUSP_DEVICE_VCU1525, XUSP_DEVICE_VERMEO_T1_MP, XUSP_DEVICE_VERMEO_T1_RF, XUSP_DEVICE_XCAU10P, XUSP_DEVICE_XCAU15P, XUSP_DEVICE_XCAU20P, XUSP_DEVICE_XCAU25P, XUSP_DEVICE_XCK26, XUSP_DEVICE_XCKU11P, XUSP_DEVICE_XCKU13P, XUSP_DEVICE_XCKU15P, XUSP_DEVICE_XCKU19P, XUSP_DEVICE_XCKU3P, XUSP_DEVICE_XCKU5P, XUSP_DEVICE_XCKU9P, XUSP_DEVICE_XCU200, XUSP_DEVICE_XCU25, XUSP_DEVICE_XCU250, XUSP_DEVICE_XCU26, XUSP_DEVICE_XCU280, XUSP_DEVICE_XCU30, XUSP_DEVICE_XCU50, XUSP_DEVICE_XCU55C, XUSP_DEVICE_XCU55N, XUSP_DEVICE_XCUX35, XUSP_DEVICE_XCVU11P, XUSP_DEVICE_XCVU13P, XUSP_DEVICE_XCVU19P, XUSP_DEVICE_XCVU23P, XUSP_DEVICE_XCVU27P, XUSP_DEVICE_XCVU29P, XUSP_DEVICE_XCVU31P, XUSP_DEVICE_XCVU33P, XUSP_DEVICE_XCVU35P, XUSP_DEVICE_XCVU37P, XUSP_DEVICE_XCVU3P, XUSP_DEVICE_XCVU45P, XUSP_DEVICE_XCVU47P, XUSP_DEVICE_XCVU57P, XUSP_DEVICE_XCVU5P, XUSP_DEVICE_XCVU7P, XUSP_DEVICE_XCVU9P, XUSP_DEVICE_XCZU1, XUSP_DEVICE_XCZU11, XUSP_DEVICE_XCZU15, XUSP_DEVICE_XCZU17, XUSP_DEVICE_XCZU19, XUSP_DEVICE_XCZU2, XUSP_DEVICE_XCZU21DR, XUSP_DEVICE_XCZU25DR, XUSP_DEVICE_XCZU27DR, XUSP_DEVICE_XCZU28DR, XUSP_DEVICE_XCZU29DR, XUSP_DEVICE_XCZU3, XUSP_DEVICE_XCZU39DR, XUSP_DEVICE_XCZU4, XUSP_DEVICE_XCZU42DR, XUSP_DEVICE_XCZU43DR, XUSP_DEVICE_XCZU46DR, XUSP_DEVICE_XCZU47DR, XUSP_DEVICE_XCZU48DR, XUSP_DEVICE_XCZU49DR, XUSP_DEVICE_XCZU5, XUSP_DEVICE_XCZU6, XUSP_DEVICE_XCZU65DR, XUSP_DEVICE_XCZU67DR, XUSP_DEVICE_XCZU7, XUSP_DEVICE_XCZU9, XUSP_DEVICE_XPEDITE2600, XUSP_DEVICE_ZCU102, XUSP_DEVICE_ZCU104, XUSP_DEVICE_ZCU106, XUSP_DEVICE_ZCU111, XUSP_DEVICE_ZCU1275, XUSP_DEVICE_ZCU1285, XUSP_DEVICE_ZCU208, XUSP_DEVICE_ZCU216, XUSP_DEVICE_ZCU670, XUSP_DEVICE_ZU_3EG, XUSP_DEVICE_ZU_5EV, and XUSP_DEVICE_ZUBOARD_1CG.

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◆ setDeviceByIDCODEOrThrow()

void XilinxUltraScalePlus::setDeviceByIDCODEOrThrow ( int  idcode)
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 53 of file XUSP_Devices.cpp.

53  {
54  int deviceID = getDeviceByIDCODEorThrow(idcode);
55  setDevice(deviceID);
56 }
void setDevice(int, std::string="") override
int getDeviceByIDCODEorThrow(int) override

◆ setDeviceByNameOrThrow()

void XilinxUltraScalePlus::setDeviceByNameOrThrow ( std::string  )
overridevirtual

Implements XilinxConfigurationAccessPort< 4, 20, 1024, 16, 2, 0, 1, 45, 3, 45,(45+3+45), 256, 60, 12, 2, 0, 0, 24, 0x7, 18, 0x3F, 8, 0x3FF, 0, 0xFF >.

Definition at line 48 of file XUSP_Devices.cpp.

48  {
49  int deviceID = getDeviceByNameOrThrow(name);
50  setDevice(deviceID, name);
51 }
int getDeviceByNameOrThrow(std::string) override

◆ setDeviceByPartNameOrThrow()

void XilinxUltraScalePlus::setDeviceByPartNameOrThrow ( )
overridevirtual

◆ test()

void XilinxUltraScalePlus::test ( bool  usableFramesOnly,
bool  testValueEqual,
uint32_t  testValue 
)

Definition at line 22 of file XUSP_Test.cpp.

22  {
23  log("Testing bitstream against value" + to_string(testValue) + ".");
25  ensureFramesAre(usableFramesOnly, testValueEqual, testValue);
26  log("Testing finished successfully.");
27 }
void ensureFramesAre(bool usableFramesOnly, bool testValueEqual, uint32_t testValue)
Definition: inlineTest.h:18

References ensureFramesAre(), and Endian::to_string().

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◆ writeBitstream()

void XilinxUltraScalePlus::writeBitstream ( std::string  ,
std::string  ,
Rect2D   
)

Creates a new bitstream file and writes the selected regions in it.

  • filename Name of the output file.
    Exceptions
    runtime_errorif args don't define a correct region.

Definition at line 137 of file XUSP_Output.cpp.

138 {
139  size_t dotpos = filename.rfind(".");
140  if(dotpos == string::npos)
141  throw runtime_error(string("Invalid file name: \"").append(filename).append("\"!\n"));
142  designName = filename.substr(0, dotpos);
143 
144  log("Writing Xilinx UltraScale+ bitstream to file \"" + filename + "\":");
145 
146  parseParams(params);
147 
149  if((cmdRect.position.row % XUSP_CLB_PER_CLOCK_REGION != 0) || (cmdRect.size.row % XUSP_CLB_PER_CLOCK_REGION != 0))
150  throw runtime_error("Currently only full clock region height relocations are supported (use row numbers multiple of 60).");
151  if(cmdRect.size.row <= 0 || cmdRect.size.col <= 0)
152  throw runtime_error("Invalid output size dimentions.");
153  }
154 
155  ofstream fout (filename, ofstream::binary | ofstream::trunc);
156  if(!fout.good())
157  throw runtime_error(string("Could not open file: \"").append(filename).append("\"!\n"));
158  if(str::iff::stringEndsWith(filename, ".bit"))
159  writeBitstreamBIT(fout, cmdRect);
160  else if(str::iff::stringEndsWith(filename, ".bin"))
161  writeBitstreamBIN(fout, cmdRect);
162  else
163  throw runtime_error(string("Unknown Xilinx UltraScale+ file format tried to be written.\n"));
164  fout.close();
165  log("Xilinx UltraScale+ bitstream file \"" + filename + "\" written successfully.");
166 }
void writeBitstreamBIT(std::ofstream &fout, Rect2D cmdRect)
Definition: inlineOutput.h:189
void writeBitstreamBIN(std::ofstream &fout, Rect2D cmdRect)
Definition: inlineOutput.h:207

References Coord2D::col, parseParams(), Rect2D::position, Coord2D::row, Rect2D::size, str::iff::stringEndsWith(), writeBitstreamBIN(), writeBitstreamBIT(), and XUSP_CLB_PER_CLOCK_REGION.

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Member Data Documentation

◆ slrMagicInstrLocation

std::streamoff XilinxUltraScalePlus::slrMagicInstrLocation[4]

Definition at line 51 of file XilinxUltraScalePlus.h.


The documentation for this class was generated from the following files: